URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_top.v] - Diff between revs 679 and 813

Rev 679	Rev 813
Line 614...	Line 614...
`);`	`);`

`//`	`//`
`// Instantiation of Instruction Cache`	`// Instantiation of Instruction Cache`
`//`	`//`
`or1200_cpu or1200_cpu(`	`or1200_cpu`
	`#(.boot_adr(boot_adr))`
	`or1200_cpu(`
`.clk(clk_i),`	`.clk(clk_i),`
`.rst(rst_i),`	`.rst(rst_i),`

`// Connection QMEM and IFETCHER inside CPU`	`// Connection QMEM and IFETCHER inside CPU`
`.ic_en(ic_en),`	`.ic_en(ic_en),`