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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_top.v] - Diff between revs 142 and 185

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Rev 142 Rev 185
Line 472... Line 472... 
wire                    du_stall;
 
wire                    du_stall;
 
wire    [dw-1:0] du_addr;
 
wire    [dw-1:0] du_addr;
 
wire    [dw-1:0] du_dat_du;
 
wire    [dw-1:0] du_dat_du;
 
wire                    du_read;
 
wire                    du_read;
 
wire                    du_write;
 
wire                    du_write;
 
wire    [12:0]           du_except_trig;
 
wire    [13:0]           du_except_trig;
 
wire    [12:0]           du_except_stop;
 
wire    [13:0]           du_except_stop;
 
wire    [`OR1200_DU_DSR_WIDTH-1:0]     du_dsr;
 
wire    [`OR1200_DU_DSR_WIDTH-1:0]     du_dsr;
 
wire    [24:0]           du_dmr1;
 
wire    [24:0]           du_dmr1;
 
wire    [dw-1:0] du_dat_cpu;
 
wire    [dw-1:0] du_dat_cpu;
 
wire    [dw-1:0] du_lsu_store_dat;
 
wire    [dw-1:0] du_lsu_store_dat;
 
wire    [dw-1:0] du_lsu_load_dat;
 
wire    [dw-1:0] du_lsu_load_dat;

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