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[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_wbmux.v] - Diff between revs 185 and 258

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Rev 185 Rev 258
Line 97... Line 97...
//
//
// Registered output from the write-back multiplexer
// Registered output from the write-back multiplexer
//
//
always @(posedge clk or posedge rst) begin
always @(posedge clk or posedge rst) begin
        if (rst) begin
        if (rst) begin
                muxreg <= #1 32'd0;
                muxreg <=  32'd0;
                muxreg_valid <= #1 1'b0;
                muxreg_valid <=  1'b0;
        end
        end
        else if (!wb_freeze) begin
        else if (!wb_freeze) begin
                muxreg <= #1 muxout;
                muxreg <=  muxout;
                muxreg_valid <= #1 rfwb_op[0];
                muxreg_valid <=  rfwb_op[0];
        end
        end
end
end
 
 
//
//
// Write-back multiplexer
// Write-back multiplexer

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