URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Show entire file |
Details |
Blame |
View Log
Rev 2 |
Rev 617 |
Line 163... |
Line 163... |
assign rx_negedge = 1'b0;
|
assign rx_negedge = 1'b0;
|
`endif
|
`endif
|
`ifdef SPI_CTRL_TX_NEGEDGE
|
`ifdef SPI_CTRL_TX_NEGEDGE
|
assign tx_negedge = 1'b1;
|
assign tx_negedge = 1'b1;
|
`else
|
`else
|
assign tx_negedge = 1'b1;
|
assign tx_negedge = 1'b0;
|
`endif
|
`endif
|
|
|
assign ctrl = {ass,1'b0,lsb,tx_negedge,rx_negedge,go,1'b0,1'b0,char_len};
|
assign ctrl = {ass,1'b0,lsb,tx_negedge,rx_negedge,go,1'b0,1'b0,char_len};
|
|
|
// Slave select register
|
// Slave select register
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.