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[/] [openrisc/] [trunk/] [or1ksim/] [ChangeLog] - Diff between revs 430 and 432

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Rev 430 Rev 432
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2010-11-25  Jeremy Bennett 
 
 
 
        * configure: Regenerated.
 
        * configure.ac: Updated version.
 
        * cpu/or1k/sprs.c (mtspr): Setting PICMR considers NMI usage.
 
        * doc/or1ksim.texi : Documented the PIC
 
        use_nmi config.
 
        * libtoplevel.c (or1ksim_interrupt): Does not clear interrupts
 
        immediately.
 
        * NEWS: Updated regarding PIC configuration.
 
        * pic/pic.c (pic_reset): Reference to PICPR
 
        removed. Initialization considers NMI use.
 
        (report_interrupt): NMI now handled through PICMR, rather than
 
        directly in the code.
 
        (pic_use_nmi): Created.
 
        (pic_reg_sec): Added "use_nmi" option.
 
        * sim-config.c (init_defconfig): config.pic.use_nmi initialized.
 
        * sim-config.h : New entry use_nmi added.
 
 
 
2010-11-24  Jeremy Bennett 
 
 
 
        * configure: Regenerated.
 
        * configure.ac: Updated version.
 
        * doc/or1ksim.texi: More clarification of interrupt behavior when
 
        edge or level triggered.
 
        * pic/pic.c (report_interrupt): Improved warning when interrupt is
 
        reported while previous one is pending.
 
        (clear_interrupt): Now works for both level and edge triggered
 
        interrupts.
 
 
2010-11-22  Julius Baxter  
2010-11-22  Julius Baxter  
 
 
        * cpu/common/execute.h : removed pic_lines variable.
        * cpu/common/execute.h : removed pic_lines variable.
        * cpu/or1k/sprs.c: Added comment clarifying PICSR behavior.
        * cpu/or1k/sprs.c: Added comment clarifying PICSR behavior.
        * pic/pic.c: Removed use of pic_lines variable, added commenting
        * pic/pic.c: Removed use of pic_lines variable, added commenting
        clarifying behavior.
        clarifying behavior.
        : only clear PICSR when level triggered.
        : only clear PICSR when level triggered.
        * doc/or1ksim.texi (Interrupt Configuration): Added clarification of
        * doc/or1ksim.texi (Interrupt Configuration): Added clarification of
        interrupt behavior when edge or level triggered.
        interrupt behavior when edge or level triggered.
 
 
2010-11-22  Julius Baxter  
2010-11-22  Julius Baxter  
 
 
        * peripheral/eth.c (eth_miim_trans): comment out debug printf()s
        * peripheral/eth.c (eth_miim_trans): comment out debug printf()s
        * cpu/or32/generate.c (generate_body): Add except_handle call to all
        * cpu/or32/generate.c (generate_body): Add except_handle call to all
        generated illegal instruction cases.
        generated illegal instruction cases.
 
 
2010-11-19  Julius Baxter  
2010-11-19  Julius Baxter  
 
 
        * peripheral/eth.c: Added new variable phy_addr to device struct and
        * peripheral/eth.c: Added new variable phy_addr to device struct and
        ability to set it in config script section. : function
        ability to set it in config script section. : function
        to emulate MIIM transactions, mainly PHYID regs at the moment.
        to emulate MIIM transactions, mainly PHYID regs at the moment.
        * peripheral/eth.h: Added MIIM bus defines.
        * peripheral/eth.h: Added MIIM bus defines.
        * doc/or1ksim.texi: Added information in eth sectin for phy_addr value
        * doc/or1ksim.texi: Added information in eth sectin for phy_addr value

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