OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [ChangeLog] - Diff between revs 440 and 442

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 440 Rev 442
Line 1... Line 1...
 
2010-12-09  Julius Baxter 
 
 
 
        * doc/or1ksim.texi: changed references to or32-uclinux-* to or32-elf-*.
 
        Added section on using SIGUSR1 signal to control trace dumping.
 
        * peripheral/eth.c: Change scheduling of TX and RX from 10 cycles to 1
 
        when idling.
 
        * toplevel.c: Added SIGUSR1 handler hook.
 
        * toplevel-support.c: : New function to toggle the trace
 
        execution control variable.
 
        * toplevel-support.h: : Add function prototype.
 
 
2010-12-08  Jeremy Bennett 
2010-12-08  Jeremy Bennett 
 
 
        * configure: Regenerated.
        * configure: Regenerated.
        * configure.ac: Updated version.
        * configure.ac: Updated version.
        * doc/or1ksim.texi: Updated Ethernet configuration section. Added
        * doc/or1ksim.texi: Updated Ethernet configuration section. Added

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.