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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
[/] [openrisc/] [trunk/] [or1ksim/] [ChangeLog] - Diff between revs 532 and 538
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Rev 532 |
Rev 538 |
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2011-05-09 Julius Baxter
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* configure: Regenerated.
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* configure.ac: Added TUN/TAP header to AC_CHECK_HEADERS
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* peripheral/eth.c: Added ifdef HAVE_LINUX_IF_TUN_H around TUN/TAP
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code and includes.
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* cpu/or1k/spr-defs.h: Fixed page number mask for MMU TLB registers.
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Added TLBEIR definition.
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Added definitions for SPR_TTMR_TP and SPR_TTCR_CNT. Removed definitions
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of SPR_TTMR_PERIOD and SPR_TTMR_CR_PERIOD.
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Added PICPR_IPRIO definition.
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* testsuite/test-code-or1k/uos/tick.c: Replace SPR_TTMR_PERIOD with
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SPR_TTMR_TP and SPR_TTCR_PERIOD with SPR_TTCR_CNT.
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* tick/tick.c: Ditto.
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* cpu/or1k/spr-dump.c: Ditto.
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* testsuite/test-code-or1k/tick/tick.c: Ditto.
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Fix continuous timer test.
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Remove spurious interrupt test. Believed to be an artifact of incorrect
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TTMR/TTCR defines.
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* testsuite/or1ksim.tests/tick.exp: Remove spurious interrupt test.
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2011-04-28 Jeremy Bennett
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2011-04-28 Jeremy Bennett
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* configure: Regenerated.
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* configure: Regenerated.
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* configure.ac: Updated version
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* configure.ac: Updated version
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* debug/debug-unit.c (set_stall_state): Clearing stall state also
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* debug/debug-unit.c (set_stall_state): Clearing stall state also
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