OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [ChangeLog] - Diff between revs 429 and 430

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 429 Rev 430
Line 1... Line 1...
2010-11-22  Julius Baxter  
2010-11-22  Julius Baxter  
 
        * cpu/common/execute.h : removed pic_lines variable.
 
        * cpu/or1k/sprs.c: Added comment clarifying PICSR behavior.
 
        * pic/pic.c: Removed use of pic_lines variable, added commenting
 
        clarifying behavior.
 
        : only clear PICSR when level triggered.
 
        * doc/or1ksim.texi (Interrupt Configuration): Added clarification of
 
        interrupt behavior when edge or level triggered.
 
 
 
2010-11-22  Julius Baxter  
        * peripheral/eth.c (eth_miim_trans): comment out debug printf()s
        * peripheral/eth.c (eth_miim_trans): comment out debug printf()s
        * cpu/or32/generate.c (generate_body): Add except_handle call to all
        * cpu/or32/generate.c (generate_body): Add except_handle call to all
        generated illegal instruction cases.
        generated illegal instruction cases.
 
 
2010-11-19  Julius Baxter  
2010-11-19  Julius Baxter  

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.