URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
[/] [openrisc/] [trunk/] [or1ksim/] [NEWS] - Diff between revs 122 and 123
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 122 |
Rev 123 |
Line 15... |
Line 15... |
* Bug 1774: l.mulu not implemented.
|
* Bug 1774: l.mulu not implemented.
|
* Bug 1775: l.jalr and l.jr don't trigger alignment exceptions.
|
* Bug 1775: l.jalr and l.jr don't trigger alignment exceptions.
|
* Bug 1776: l.addic is not implemented.
|
* Bug 1776: l.addic is not implemented.
|
* Bug 1777: l.macrc not correctly implemented.
|
* Bug 1777: l.macrc not correctly implemented.
|
* Bug 1778: l.ror and l.rori are not implemented.
|
* Bug 1778: l.ror and l.rori are not implemented.
|
|
* Bug 1779: l.mtspr implementation is incorrect.
|
|
|
The following bugs are either cannot be reproduced or will not be fixed.
|
The following bugs are either cannot be reproduced or will not be fixed.
|
|
|
The following bugs are outstanding
|
The following bugs are outstanding
|
* Bug 1758: Memory controller issues. Workaround in the user guide.
|
* Bug 1758: Memory controller issues. Workaround in the user guide.
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.