OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [NEWS] - Diff between revs 508 and 510

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 508 Rev 510
Line 1... Line 1...
              Or1ksim: The OpenRISC 1000 Architectural Simulator
              Or1ksim: The OpenRISC 1000 Architectural Simulator
              ==================================================
              ==================================================
 
 
 
 
New in release 0.5.0rc3
New in release 0.5.1rc1
=======================
=======================
 
 
New features (shouldn't be there during a release cycle, but prompted by debug
New features (shouldn't be there during a release cycle, but prompted by debug
needs elsewhere in the tool chain).
needs elsewhere in the tool chain).
 
 
Line 36... Line 36...
* Bug 1823: Configuration file error line numbers are wrong.
* Bug 1823: Configuration file error line numbers are wrong.
* Bug 1822: ATA configuration is broken. Documented in user guide.
* Bug 1822: ATA configuration is broken. Documented in user guide.
* Bug 1758: Memory controller issues. Workaround in the user guide.
* Bug 1758: Memory controller issues. Workaround in the user guide.
 
 
 
 
 
New in release 0.5.0rc3
 
=======================
 
 
 
No bugs are fixed.
 
 
 
The following bugs are outstanding
 
* Bug 1823: Configuration file error line numbers are wrong.
 
* Bug 1822: ATA configuration is broken. Documented in user guide.
 
* Bug 1758: Memory controller issues. Workaround in the user guide.
 
 
 
 
New in release 0.5.0rc2
New in release 0.5.0rc2
=======================
=======================
 
 
No new features. This is purely bug fixes post-0.5.0rc1.
No new features. This is purely bug fixes post-0.5.0rc1.
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.