OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [NEWS] - Diff between revs 420 and 432

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 420 Rev 432
Line 9... Line 9...
needs elsewhere in the tool chain).
needs elsewhere in the tool chain).
 
 
New option --trace provides a one line dump of instruction executed and any
New option --trace provides a one line dump of instruction executed and any
register or memory location changed after each instruction.
register or memory location changed after each instruction.
 
 
 
A new configuration option "use_nmi" is added to the programmable interrupt
 
controller (PIC). This causes interrupt lines 0 and 1 to be non-maskable, but
 
only in the sense that the corresponding bits in PICMR are hard-wired to 1.
 
 
New config setting for memory initialization "exitnops" fills memory with
New config setting for memory initialization "exitnops" fills memory with
"l.nop 1", which will cause the simulator to exit. Good for tracking pointer
"l.nop 1", which will cause the simulator to exit. Good for tracking pointer
corruption.
corruption.
 
 
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.