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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [cache/] [icache-model.c] - Diff between revs 19 and 83

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Rev 19 Rev 83
Line 224... Line 224...
 
 
 
 
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------*/
/*!Enable or disable the instruction cache
/*!Enable or disable the instruction cache
 
 
   Set the corresponding field in the UPR
   Set the corresponding fields in the UPR
 
 
   @param[in] val  The value to use
   @param[in] val  The value to use
   @param[in] dat  The config data structure                                 */
   @param[in] dat  The config data structure                                 */
/*---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------*/
static void
static void
Line 481... Line 481...
        {
        {
          fprintf (stderr, "OOM\n");
          fprintf (stderr, "OOM\n");
          exit (1);
          exit (1);
        }
        }
 
 
 
      /* Clear the cache data. John Alfredo's fix for using 0 (which is a
 
         valid tag), so we now use -1 */
      memset (ic->mem,  0, size);
      memset (ic->mem,  0, size);
      memset (ic->lrus, 0, ic->nsets * ic->nways * sizeof (unsigned int));
      memset (ic->lrus, 0, ic->nsets * ic->nways * sizeof (unsigned int));
      memset (ic->tags, 0, ic->nsets * ic->nways * sizeof (oraddr_t));
      memset (ic->tags, -1, ic->nsets * ic->nways * sizeof (oraddr_t));
    }
    }
  else
  else
    {
    {
      ic->enabled = 0;
      ic->enabled = 0;
    }
    }

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