URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 220 |
Rev 230 |
Line 1188... |
Line 1188... |
}
|
}
|
|
|
if (verify_memoryarea (i))
|
if (verify_memoryarea (i))
|
{
|
{
|
uint32_t insn = eval_direct32 (i, 0, 0);
|
uint32_t insn = eval_direct32 (i, 0, 0);
|
int index = insn_decode (insn);
|
int index = or1ksim_insn_decode (insn);
|
|
|
PRINTF ("%08" PRIx32 " ", insn);
|
PRINTF ("%08" PRIx32 " ", insn);
|
|
|
if (index >= 0)
|
if (index >= 0)
|
{
|
{
|
disassemble_insn (insn);
|
or1ksim_disassemble_insn (insn);
|
PRINTF (" %s", disassembled);
|
PRINTF (" %s", or1ksim_disassembled);
|
}
|
}
|
else
|
else
|
{
|
{
|
PRINTF ("<invalid>");
|
PRINTF ("<invalid>");
|
}
|
}
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.