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#include "dcache-model.h"
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#include "dcache-model.h"
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#include "labels.h"
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#include "labels.h"
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#include "opcode/or32.h"
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#include "opcode/or32.h"
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#include "dmmu.h"
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#include "dmmu.h"
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#include "immu.h"
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#include "immu.h"
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#include "execute.h"
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#if DYNAMIC_EXECUTION
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#if DYNAMIC_EXECUTION
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#include "dyn-rec.h"
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#include "dyn-rec.h"
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#endif
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#endif
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Line 1218... |
}
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}
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}
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}
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} /* disassemble_memory() */
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} /* disassemble_memory() */
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/*---------------------------------------------------------------------------*/
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/*!Trace the current instr to output
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This is a simpler form of disassemble_memory for GDB instruction tracing.
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Output format is symbolic disassembly, one instruction per line. Start each
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line with its hex address. At the end print the value of any destination
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register, the flag and the number of cycles executed.
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There are all sorts of ways to trip this up, but they are unlikely. The
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validity of a memory area is taken from the address of the start of a line
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to be printed, so assumes the following 3 bytes are present. This could be
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fooled by ridiculous memory declarations.
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@param[in] addr Address of the instruction to trace */
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/*---------------------------------------------------------------------------*/
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void
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disassemble_instr (oraddr_t addr)
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{
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PRINTF ("%" PRIxADDR ": ", addr);
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if (verify_memoryarea (addr))
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{
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uint32_t insn = eval_direct32 (addr, 0, 0);
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int index = or1ksim_insn_decode (insn);
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PRINTF ("%08" PRIx32 " ", insn);
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if (index >= 0)
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{
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or1ksim_disassemble_trace_index (insn, index);
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PRINTF ("%-24s", or1ksim_disassembled);
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/* Put either the register assignment, or store */
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if (-1 != trace_dest_reg)
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{
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PRINTF ("r%-2u = %" PRIxREG "", trace_dest_reg,
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evalsim_reg (trace_dest_reg));
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}
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else
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{
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uorreg_t store_val = 0;
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oraddr_t store_addr = 0;
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if (0 != trace_store_width)
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{
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store_val = evalsim_reg (trace_store_val_reg);
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store_addr = evalsim_reg (trace_store_addr_reg) +
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trace_store_imm;
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}
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switch (trace_store_width)
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{
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case 1:
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PRINTF ("[%" PRIxADDR "] = %02x ", store_addr,
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store_val);
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break;
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case 2:
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PRINTF ("[%" PRIxADDR "] = %04x ", store_addr, store_val);
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break;
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case 4:
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PRINTF ("[%" PRIxADDR "] = %08x", store_addr, store_val);
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break;
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default:
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PRINTF (" ");
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break;
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}
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}
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/* Print the flag */
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PRINTF (" flag: %u\n", cpu_state.sprs[SPR_SR] & SPR_SR_F ? 1 : 0);
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}
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else
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{
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PRINTF ("<invalid>\n");
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}
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}
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else
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{
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/* Not a valid memory area. Print Xs as required */
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PRINTF ("XXXXXXXX\n");
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}
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} /* disassemble_instr() */
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/* Closes files, etc. */
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/* Closes files, etc. */
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void
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void
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done_memory_table ()
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done_memory_table ()
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{
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{
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