OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [common/] [execute.h] - Diff between revs 19 and 112

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 19 Rev 112
Line 37... Line 37...
#endif
#endif
 
 
 
 
#define CURINSN(INSN) (strcmp(cur->insn, (INSN)) == 0)
#define CURINSN(INSN) (strcmp(cur->insn, (INSN)) == 0)
 
 
/*! Sets a new SPR_SR_OV value, based on next register value */
/*! Sets a new SPR_SR_OV value, based on a three register operation. */
#if SET_OV_FLAG
 
#define SET_OV_FLAG_FN(value) \
#define SET_OV_FLAG_FN(value) \
  if((value) & 0x80000000) \
  if((value) & 0x80000000) \
    cpu_state.sprs[SPR_SR] |= SPR_SR_OV; \
    cpu_state.sprs[SPR_SR] |= SPR_SR_OV; \
  else \
  else \
    cpu_state.sprs[SPR_SR] &= ~SPR_SR_OV
    cpu_state.sprs[SPR_SR] &= ~SPR_SR_OV
#else
 
#define SET_OV_FLAG_FN(value)
 
#endif
 
 
 
/*!The main structure holding the current execution state of the CPU
/*!The main structure holding the current execution state of the CPU
 
 
   Not to be confused with @c runtime, which holds the state of the
   Not to be confused with @c runtime, which holds the state of the
   simulation.
   simulation.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.