OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [common/] [execute.h] - Diff between revs 420 and 430

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 420 Rev 430
Line 56... Line 56...
  oraddr_t             insn_ea;         /*!< EA of instrs that have an EA */
  oraddr_t             insn_ea;         /*!< EA of instrs that have an EA */
  int                  delay_insn;      /*!< Is current instr in delay slot */
  int                  delay_insn;      /*!< Is current instr in delay slot */
  int                  npc_not_valid;   /*!< NPC updated while stalled */
  int                  npc_not_valid;   /*!< NPC updated while stalled */
  oraddr_t             pc;              /*!< PC (and translated PC) */
  oraddr_t             pc;              /*!< PC (and translated PC) */
  oraddr_t             pc_delay;        /*!< Delay instr EA register */
  oraddr_t             pc_delay;        /*!< Delay instr EA register */
  uint32_t             pic_lines;       /*!< State of PIC lines */
 
  struct iqueue_entry  iqueue;          /*!< Decode of just executed instr */
  struct iqueue_entry  iqueue;          /*!< Decode of just executed instr */
  struct iqueue_entry  icomplet;        /*!< Decode of instr before this */
  struct iqueue_entry  icomplet;        /*!< Decode of instr before this */
 
 
#if DYNAMIC_EXECUTION
#if DYNAMIC_EXECUTION
  jmp_buf              excpt_loc;       /*!< Longjump here for exception */
  jmp_buf              excpt_loc;       /*!< Longjump here for exception */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.