OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [or1k/] [opcode/] [or32.h] - Diff between revs 420 and 458

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 420 Rev 458
Line 169... Line 169...
extern int           trace_dest_reg;
extern int           trace_dest_reg;
extern int           trace_store_addr_reg;
extern int           trace_store_addr_reg;
extern unsigned int  trace_store_imm;
extern unsigned int  trace_store_imm;
extern int           trace_store_val_reg;
extern int           trace_store_val_reg;
extern int           trace_store_width;
extern int           trace_store_width;
 
extern int           trace_dest_spr;
 
 
/* Calculates instruction length in bytes.  Always 4 for OR32. */
/* Calculates instruction length in bytes.  Always 4 for OR32. */
extern int or1ksim_insn_len PARAMS((int insn_index));
extern int or1ksim_insn_len PARAMS((int insn_index));
 
 
/* MM: Returns instruction name from index.  */
/* MM: Returns instruction name from index.  */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.