URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 233 |
Rev 239 |
Line 164... |
Line 164... |
* Bit definitions for the Version Register
|
* Bit definitions for the Version Register
|
*
|
*
|
*/
|
*/
|
#define SPR_VR_VER 0xff000000 /* Processor version */
|
#define SPR_VR_VER 0xff000000 /* Processor version */
|
#define SPR_VR_CFG 0x00ff0000 /* Processor configuration */
|
#define SPR_VR_CFG 0x00ff0000 /* Processor configuration */
|
#define SPR_VR_RES 0x00ff0000 /* Reserved */
|
#define SPR_VR_RES 0x0000ffc0 /* Reserved */
|
#define SPR_VR_REV 0x0000003f /* Processor revision */
|
#define SPR_VR_REV 0x0000003f /* Processor revision */
|
|
|
#define SPR_VR_VER_OFF 24
|
#define SPR_VR_VER_OFF 24
|
#define SPR_VR_CFG_OFF 16
|
#define SPR_VR_CFG_OFF 16
|
#define SPR_VR_REV_OFF 0
|
#define SPR_VR_REV_OFF 0
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.