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/*
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/*
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* Bit definitions for Tick Timer Control Register
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* Bit definitions for Tick Timer Control Register
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*
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*
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*/
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*/
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#define SPR_TTCR_CNT 0xffffffff /* Count, time period */
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#define SPR_TTCR_CNT 0x0fffffff /* Count, time period */
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#define SPR_TTMR_TP 0x0fffffff /* Time period */
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#define SPR_TTMR_TP 0x0fffffff /* Time period */
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#define SPR_TTMR_IP 0x10000000 /* Interrupt Pending */
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#define SPR_TTMR_IP 0x10000000 /* Interrupt Pending */
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#define SPR_TTMR_IE 0x20000000 /* Interrupt Enable */
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#define SPR_TTMR_IE 0x20000000 /* Interrupt Enable */
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#define SPR_TTMR_DI 0x00000000 /* Disabled */
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#define SPR_TTMR_DI 0x00000000 /* Disabled */
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#define SPR_TTMR_RT 0x40000000 /* Restart tick */
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#define SPR_TTMR_RT 0x40000000 /* Restart tick */
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