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[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [or1k/] [sprs.c] - Diff between revs 436 and 508

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Rev 436 Rev 508
Line 161... Line 161...
  case SPR_PICMR:
  case SPR_PICMR:
    /* If we have non-maskable interrupts, then the bottom two bits are always
    /* If we have non-maskable interrupts, then the bottom two bits are always
       one. */
       one. */
    if (config.pic.use_nmi)
    if (config.pic.use_nmi)
      {
      {
        cpu_state.sprs[SPR_SR] |= 0x00000003;
        cpu_state.sprs[SPR_PICMR] |= 0x00000003;
      }
      }
 
 
    if(cpu_state.sprs[SPR_SR] & SPR_SR_IEE)
    if(cpu_state.sprs[SPR_SR] & SPR_SR_IEE)
      pic_ints_en();
      pic_ints_en();
    break;
    break;

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