| Line 106... |
Line 106... |
break;
|
break;
|
case SPR_SR:
|
case SPR_SR:
|
cpu_state.sprs[regno] |= SPR_SR_FO;
|
cpu_state.sprs[regno] |= SPR_SR_FO;
|
if((value & SPR_SR_IEE) && !(prev_val & SPR_SR_IEE))
|
if((value & SPR_SR_IEE) && !(prev_val & SPR_SR_IEE))
|
pic_ints_en();
|
pic_ints_en();
|
#if DYNAMIC_EXECUTION
|
|
if((value & SPR_SR_IME) && !(prev_val & SPR_SR_IME)) {
|
|
TRACE_(immu)("IMMU just became enabled (%lli).\n", runtime.sim.cycles);
|
|
recheck_immu(IMMU_GOT_ENABLED);
|
|
} else if(!(value & SPR_SR_IME) && (prev_val & SPR_SR_IME)) {
|
|
TRACE_(immu)("Remove counting of mmu hit delay with cycles (%lli)\n",
|
|
runtime.sim.cycles);
|
|
recheck_immu(IMMU_GOT_DISABLED);
|
|
}
|
|
#endif
|
|
break;
|
break;
|
case SPR_NPC:
|
case SPR_NPC:
|
{
|
{
|
/* The debugger has redirected us to a new address */
|
/* The debugger has redirected us to a new address */
|
/* This is usually done to reissue an instruction
|
/* This is usually done to reissue an instruction
|
| Line 197... |
Line 187... |
else
|
else
|
cpu_state.sprs[regno] = IADDR_PAGE(value) |
|
cpu_state.sprs[regno] = IADDR_PAGE(value) |
|
(value & (SPR_ITLBTR_CC | SPR_ITLBTR_CI | SPR_ITLBTR_WBC | SPR_ITLBTR_WOM |
|
(value & (SPR_ITLBTR_CC | SPR_ITLBTR_CI | SPR_ITLBTR_WBC | SPR_ITLBTR_WOM |
|
SPR_ITLBTR_A | SPR_ITLBTR_D | SPR_ITLBTR_SXE | SPR_ITLBTR_UXE));
|
SPR_ITLBTR_A | SPR_ITLBTR_D | SPR_ITLBTR_SXE | SPR_ITLBTR_UXE));
|
|
|
#if DYNAMIC_EXECUTION
|
|
if(cpu_state.sprs[SPR_SR] & SPR_SR_IME) {
|
|
/* The immu got reconfigured. Recheck if the current page in execution
|
|
* is resident in the immu ways. This check would be done during the
|
|
* instruction fetch but since the dynamic execution model does not do
|
|
* instruction fetchs, do it now. */
|
|
recheck_immu(0);
|
|
}
|
|
#endif
|
|
}
|
}
|
|
|
/* Links to GPRS */
|
/* Links to GPRS */
|
if(regno >= 0x0400 && regno < 0x0420) {
|
if(regno >= 0x0400 && regno < 0x0420) {
|
cpu_state.reg[regno - 0x0400] = value;
|
cpu_state.reg[regno - 0x0400] = value;
|
