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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [or32/] [execute.c] - Diff between revs 233 and 235

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Rev 233 Rev 235
Line 42... Line 42...
/* Package includes */
/* Package includes */
#include "execute.h"
#include "execute.h"
#include "toplevel-support.h"
#include "toplevel-support.h"
#include "except.h"
#include "except.h"
#include "labels.h"
#include "labels.h"
#include "gdbcomm.h"
 
#include "sched.h"
#include "sched.h"
#include "stats.h"
#include "stats.h"
#include "opcode/or32.h"
#include "opcode/or32.h"
#include "dmmu.h"
#include "dmmu.h"
#include "immu.h"
#include "immu.h"
Line 981... Line 980...
            {
            {
              if (config.debug.rsp_enabled)
              if (config.debug.rsp_enabled)
                {
                {
                  handle_rsp ();
                  handle_rsp ();
                }
                }
              else if (config.debug.gdb_enabled)
 
                {
 
                  block_jtag ();
 
                  handle_server_socket (FALSE);
 
                }
 
              else
              else
                {
                {
                  fprintf (stderr, "ERROR: CPU stalled and GDB connection not "
                  fprintf (stderr, "ERROR: CPU stalled and GDB connection not "
                           "enabled: Invoking CLI and terminating.\n");
                           "enabled: Invoking CLI and terminating.\n");
                  /* Dump the user into interactive mode.  From there he or
                  /* Dump the user into interactive mode.  From there he or
Line 1021... Line 1015...
      if (config.vapi.enabled && runtime.vapi.enabled)
      if (config.vapi.enabled && runtime.vapi.enabled)
        {
        {
          vapi_check ();
          vapi_check ();
        }
        }
 
 
      if (config.debug.gdb_enabled)
 
        {
 
          handle_server_socket (FALSE); /* block & check_stdin = false */
 
        }
 
 
 
      if (config.debug.enabled)
      if (config.debug.enabled)
        {
        {
          if (cpu_state.sprs[SPR_DMR1] & SPR_DMR1_ST)
          if (cpu_state.sprs[SPR_DMR1] & SPR_DMR1_ST)
            {
            {
              set_stall_state (1);
              set_stall_state (1);

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