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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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Rev 104 |
Rev 107 |
Line 211... |
Line 211... |
temp3 = PARAM2;
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temp3 = PARAM2;
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temp2 = PARAM1;
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temp2 = PARAM1;
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if (temp3)
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if (temp3)
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temp1 = temp2 / temp3;
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temp1 = temp2 / temp3;
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else {
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else {
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except_handle(EXCEPT_ILLEGAL, cpu_state.pc);
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mtspr (SPR_SR, SPR_SR_CY | mfspr (SPR_SR)); /* Div by zero sets carry */
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except_handle (EXCEPT_RANGE, cpu_state.pc);
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return;
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return;
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}
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}
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SET_OV_FLAG_FN (temp1);
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SET_OV_FLAG_FN (temp1);
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SET_PARAM0(temp1);
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SET_PARAM0(temp1);
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}
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}
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Line 225... |
Line 226... |
temp3 = PARAM2;
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temp3 = PARAM2;
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temp2 = PARAM1;
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temp2 = PARAM1;
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if (temp3)
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if (temp3)
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temp1 = temp2 / temp3;
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temp1 = temp2 / temp3;
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else {
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else {
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except_handle(EXCEPT_ILLEGAL, cpu_state.pc);
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mtspr (SPR_SR, SPR_SR_CY | mfspr (SPR_SR)); /* Div by zero sets carry */
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except_handle(EXCEPT_RANGE, cpu_state.pc);
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return;
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return;
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}
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}
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SET_OV_FLAG_FN (temp1);
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SET_OV_FLAG_FN (temp1);
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SET_PARAM0(temp1);
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SET_PARAM0(temp1);
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/* runtime.sim.cycles += 16; */
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/* runtime.sim.cycles += 16; */
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