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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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Rev 122 |
Line 415... |
Line 415... |
temp1 = PARAM1 >> PARAM2;
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temp1 = PARAM1 >> PARAM2;
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SET_OV_FLAG_FN (temp1);
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SET_OV_FLAG_FN (temp1);
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SET_PARAM0(temp1);
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SET_PARAM0(temp1);
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/* runtime.sim.cycles += 2; */
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/* runtime.sim.cycles += 2; */
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}
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}
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INSTRUCTION (l_ror) {
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uorreg_t temp1;
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temp1 = PARAM1 >> (PARAM2 & 0x1f);
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temp1 |= PARAM1 << (32 - (PARAM2 & 0x1f));
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SET_PARAM0(temp1);
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}
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INSTRUCTION (l_bf) {
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INSTRUCTION (l_bf) {
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if (config.bpb.enabled) {
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if (config.bpb.enabled) {
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int fwd = (PARAM0 >= cpu_state.pc) ? 1 : 0;
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int fwd = (PARAM0 >= cpu_state.pc) ? 1 : 0;
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or1k_mstats.bf[cpu_state.sprs[SPR_SR] & SPR_SR_F ? 1 : 0][fwd]++;
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or1k_mstats.bf[cpu_state.sprs[SPR_SR] & SPR_SR_F ? 1 : 0][fwd]++;
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bpb_update(current->insn_addr, cpu_state.sprs[SPR_SR] & SPR_SR_F ? 1 : 0);
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bpb_update(current->insn_addr, cpu_state.sprs[SPR_SR] & SPR_SR_F ? 1 : 0);
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