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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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Rev 127 |
Rev 143 |
Line 556... |
Line 556... |
fprintf(stderr, "@exit : cycles %lld, insn #%lld\n", runtime.sim.cycles,
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fprintf(stderr, "@exit : cycles %lld, insn #%lld\n", runtime.sim.cycles,
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runtime.cpu.instructions);
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runtime.cpu.instructions);
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fprintf(stderr, " diff : cycles %lld, insn #%lld\n",
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fprintf(stderr, " diff : cycles %lld, insn #%lld\n",
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runtime.sim.cycles - runtime.sim.reset_cycles,
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runtime.sim.cycles - runtime.sim.reset_cycles,
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runtime.cpu.instructions - runtime.cpu.reset_instructions);
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runtime.cpu.instructions - runtime.cpu.reset_instructions);
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if (config.debug.gdb_enabled)
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if (config.sim.is_library)
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{
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runtime.cpu.halted = 1;
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set_stall_state (1);
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set_stall_state (1);
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}
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else if (config.debug.gdb_enabled)
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{
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set_stall_state (1);
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}
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else
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else
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{
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sim_done();
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sim_done();
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}
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break;
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break;
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case NOP_CNT_RESET:
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case NOP_CNT_RESET:
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PRINTF("****************** counters reset ******************\n");
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PRINTF("****************** counters reset ******************\n");
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PRINTF("cycles %lld, insn #%lld\n", runtime.sim.cycles, runtime.cpu.instructions);
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PRINTF("cycles %lld, insn #%lld\n", runtime.sim.cycles, runtime.cpu.instructions);
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PRINTF("****************** counters reset ******************\n");
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PRINTF("****************** counters reset ******************\n");
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