Line 551... |
Line 551... |
except_handle(EXCEPT_TRAP, cpu_state.sprs[SPR_EEAR_BASE]);
|
except_handle(EXCEPT_TRAP, cpu_state.sprs[SPR_EEAR_BASE]);
|
}
|
}
|
INSTRUCTION (l_mac) {
|
INSTRUCTION (l_mac) {
|
uorreg_t lo, hi;
|
uorreg_t lo, hi;
|
LONGEST l;
|
LONGEST l;
|
orreg_t x, y;
|
orreg_t x, y, t;
|
|
|
lo = cpu_state.sprs[SPR_MACLO];
|
lo = cpu_state.sprs[SPR_MACLO];
|
hi = cpu_state.sprs[SPR_MACHI];
|
hi = cpu_state.sprs[SPR_MACHI];
|
x = PARAM0;
|
x = PARAM0;
|
y = PARAM1;
|
y = PARAM1;
|
/* PRINTF ("[%"PRIxREG",%"PRIxREG"]\t", x, y); */
|
/* PRINTF ("[%"PRIxREG",%"PRIxREG"]\t", x, y); */
|
|
|
|
/* Compute the temporary as (signed) 32-bits, then sign-extend to 64 when
|
|
adding in. */
|
l = (ULONGEST)lo | ((LONGEST)hi << 32);
|
l = (ULONGEST)lo | ((LONGEST)hi << 32);
|
l += (LONGEST) x * (LONGEST) y;
|
t = x * y;
|
|
l += (LONGEST) t;
|
|
|
/* This implementation is very fast - it needs only one cycle for mac. */
|
/* This implementation is very fast - it needs only one cycle for mac. */
|
lo = ((ULONGEST)l) & 0xFFFFFFFF;
|
lo = ((ULONGEST)l) & 0xFFFFFFFF;
|
hi = ((LONGEST)l) >> 32;
|
hi = ((LONGEST)l) >> 32;
|
cpu_state.sprs[SPR_MACLO] = lo;
|
cpu_state.sprs[SPR_MACLO] = lo;
|
Line 591... |
Line 595... |
cpu_state.sprs[SPR_MACLO] = lo;
|
cpu_state.sprs[SPR_MACLO] = lo;
|
cpu_state.sprs[SPR_MACHI] = hi;
|
cpu_state.sprs[SPR_MACHI] = hi;
|
/* PRINTF ("(%"PRIxREG",%"PRIxREG")\n", hi, lo); */
|
/* PRINTF ("(%"PRIxREG",%"PRIxREG")\n", hi, lo); */
|
}
|
}
|
INSTRUCTION (l_macrc) {
|
INSTRUCTION (l_macrc) {
|
uorreg_t lo, hi;
|
orreg_t lo;
|
LONGEST l;
|
|
/* No need for synchronization here -- all MAC instructions are 1 cycle long. */
|
/* No need for synchronization here -- all MAC instructions are 1 cycle long. */
|
lo = cpu_state.sprs[SPR_MACLO];
|
lo = cpu_state.sprs[SPR_MACLO];
|
hi = cpu_state.sprs[SPR_MACHI];
|
|
l = (ULONGEST) lo | ((LONGEST)hi << 32);
|
|
l >>= 28;
|
|
//PRINTF ("<%08x>\n", (unsigned long)l);
|
//PRINTF ("<%08x>\n", (unsigned long)l);
|
SET_PARAM0((orreg_t)l);
|
SET_PARAM0(lo);
|
cpu_state.sprs[SPR_MACLO] = 0;
|
cpu_state.sprs[SPR_MACLO] = 0;
|
cpu_state.sprs[SPR_MACHI] = 0;
|
cpu_state.sprs[SPR_MACHI] = 0;
|
}
|
}
|
INSTRUCTION (l_cmov) {
|
INSTRUCTION (l_cmov) {
|
SET_PARAM0(cpu_state.sprs[SPR_SR] & SPR_SR_F ? PARAM1 : PARAM2);
|
SET_PARAM0(cpu_state.sprs[SPR_SR] & SPR_SR_F ? PARAM1 : PARAM2);
|