URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [or32/] [insnset.c] - Diff between revs 483 and 556

Rev 483	Rev 556
Line 709...	Line 709...
`}`	`}`
`INSTRUCTION (l_mfspr) {`	`INSTRUCTION (l_mfspr) {`
`uint16_t regno = PARAM1 \| PARAM2;`	`uint16_t regno = PARAM1 \| PARAM2;`
`uorreg_t value = mfspr(regno);`	`uorreg_t value = mfspr(regno);`

`if (cpu_state.sprs[SPR_SR] & SPR_SR_SM)`	`if ((cpu_state.sprs[SPR_SR] & SPR_SR_SM) \|\|`
	`// TODO: Check if this SPR should actually be allowed to be read with`
	`// SR's SM==0 and SUMRA==1`
	`(!(cpu_state.sprs[SPR_SR] & SPR_SR_SM) &&`
	`(cpu_state.sprs[SPR_SR] & SPR_SR_SUMRA)))`
`SET_PARAM0(value);`	`SET_PARAM0(value);`
`else {`	`else`
	`{`
`SET_PARAM0(0);`	`SET_PARAM0(0);`
`PRINTF("WARNING: trying to read SPR while SR[SUPV] is cleared.\n");`	`PRINTF("WARNING: trying to read SPR while SR[SUPV] and SR[SUMRA] is cleared.\n");`
`sim_done();`	`sim_done();`
`}`	`}`
`}`	`}`
`INSTRUCTION (l_sys) {`	`INSTRUCTION (l_sys) {`
`except_handle(EXCEPT_SYSCALL, cpu_state.sprs[SPR_EEAR_BASE]);`	`except_handle(EXCEPT_SYSCALL, cpu_state.sprs[SPR_EEAR_BASE]);`