| Line 544... |
Line 544... |
pcnext = cpu_state.sprs[SPR_EPCR_BASE];
|
pcnext = cpu_state.sprs[SPR_EPCR_BASE];
|
mtspr(SPR_SR, cpu_state.sprs[SPR_ESR_BASE]);
|
mtspr(SPR_SR, cpu_state.sprs[SPR_ESR_BASE]);
|
}
|
}
|
INSTRUCTION (l_nop) {
|
INSTRUCTION (l_nop) {
|
uint32_t k = PARAM0;
|
uint32_t k = PARAM0;
|
switch (k) {
|
switch (k)
|
|
{
|
case NOP_NOP:
|
case NOP_NOP:
|
break;
|
break;
|
case NOP_EXIT:
|
case NOP_EXIT:
|
PRINTFQ("exit(%"PRIdREG")\n", evalsim_reg (3));
|
PRINTFQ("exit(%"PRIdREG")\n", evalsim_reg (3));
|
PRINTFQ("@reset : cycles %lld, insn #%lld\n",
|
PRINTFQ("@reset : cycles %lld, insn #%lld\n",
|
| Line 566... |
Line 567... |
else
|
else
|
{
|
{
|
sim_done();
|
sim_done();
|
}
|
}
|
break;
|
break;
|
|
case NOP_REPORT:
|
|
PRINTF("report(0x%"PRIxREG");\n", evalsim_reg(3));
|
|
break;
|
|
case NOP_PUTC: /*JPB */
|
|
printf( "%c", (char)(evalsim_reg( 3 ) & 0xff));
|
|
fflush( stdout );
|
|
break;
|
case NOP_CNT_RESET:
|
case NOP_CNT_RESET:
|
PRINTF("****************** counters reset ******************\n");
|
PRINTF("****************** counters reset ******************\n");
|
PRINTF("cycles %lld, insn #%lld\n", runtime.sim.cycles, runtime.cpu.instructions);
|
PRINTF("cycles %lld, insn #%lld\n", runtime.sim.cycles, runtime.cpu.instructions);
|
PRINTF("****************** counters reset ******************\n");
|
PRINTF("****************** counters reset ******************\n");
|
runtime.sim.reset_cycles = runtime.sim.cycles;
|
runtime.sim.reset_cycles = runtime.sim.cycles;
|
runtime.cpu.reset_instructions = runtime.cpu.instructions;
|
runtime.cpu.reset_instructions = runtime.cpu.instructions;
|
break;
|
break;
|
case NOP_PUTC: /*JPB */
|
|
printf( "%c", (char)(evalsim_reg( 3 ) & 0xff));
|
|
fflush( stdout );
|
|
break;
|
|
case NOP_GET_TICKS:
|
case NOP_GET_TICKS:
|
cpu_state.reg[11] = runtime.sim.cycles & 0xffffffff;
|
cpu_state.reg[11] = runtime.sim.cycles & 0xffffffff;
|
cpu_state.reg[12] = runtime.sim.cycles >> 32;
|
cpu_state.reg[12] = runtime.sim.cycles >> 32;
|
break;
|
break;
|
case NOP_GET_PS:
|
case NOP_GET_PS:
|
| Line 590... |
Line 594... |
runtime.sim.hush = 0;
|
runtime.sim.hush = 0;
|
break;
|
break;
|
case NOP_TRACE_OFF:
|
case NOP_TRACE_OFF:
|
runtime.sim.hush = 1;
|
runtime.sim.hush = 1;
|
break;
|
break;
|
case NOP_REPORT:
|
case NOP_RANDOM:
|
PRINTF("report(0x%"PRIxREG");\n", evalsim_reg(3));
|
cpu_state.reg[11] = (unsigned int) (random () & 0xffffffff);
|
|
break;
|
|
case NOP_OR1KSIM:
|
|
cpu_state.reg[11] = 1;
|
|
break;
|
default:
|
default:
|
if (k >= NOP_REPORT_FIRST && k <= NOP_REPORT_LAST)
|
|
PRINTF("report %" PRIdREG " (0x%"PRIxREG");\n", k - NOP_REPORT_FIRST,
|
|
evalsim_reg(3));
|
|
break;
|
break;
|
}
|
}
|
}
|
}
|
INSTRUCTION (l_sfeq) {
|
INSTRUCTION (l_sfeq) {
|
if(PARAM0 == PARAM1)
|
if(PARAM0 == PARAM1)
|
