URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [or32/] [or32.c] - Diff between revs 104 and 114

Rev 104	Rev 114
Line 330...	Line 330...
`{"l.lhs", "rD,I(rA)", "10 0x6 DDDDD AAAAA IIII IIII IIII IIII",`	`{"l.lhs", "rD,I(rA)", "10 0x6 DDDDD AAAAA IIII IIII IIII IIII",`
`EF (l_lhs), 0, it_load},`	`EF (l_lhs), 0, it_load},`

`{"l.addi", "rD,rA,I", "10 0x7 DDDDD AAAAA IIII IIII IIII IIII",`	`{"l.addi", "rD,rA,I", "10 0x7 DDDDD AAAAA IIII IIII IIII IIII",`
`EF (l_add), OR32_W_FLAG, it_arith},`	`EF (l_add), OR32_W_FLAG, it_arith},`
`{"l.addic", "rD,rA,I", "10 0x8 DDDDD AAAAA IIII IIII IIII IIII", EFI,`	`{"l.addic", "rD,rA,I", "10 0x8 DDDDD AAAAA IIII IIII IIII IIII",`
`0, it_arith},`	`EF (l_addc), OR32_W_FLAG, it_arith},`
`{"l.andi", "rD,rA,K", "10 0x9 DDDDD AAAAA KKKK KKKK KKKK KKKK",`	`{"l.andi", "rD,rA,K", "10 0x9 DDDDD AAAAA KKKK KKKK KKKK KKKK",`
`EF (l_and), OR32_W_FLAG, it_arith},`	`EF (l_and), OR32_W_FLAG, it_arith},`
`{"l.ori", "rD,rA,K", "10 0xA DDDDD AAAAA KKKK KKKK KKKK KKKK",`	`{"l.ori", "rD,rA,K", "10 0xA DDDDD AAAAA KKKK KKKK KKKK KKKK",`
`EF (l_or), 0, it_arith},`	`EF (l_or), 0, it_arith},`
`{"l.xori", "rD,rA,I", "10 0xB DDDDD AAAAA IIII IIII IIII IIII",`	`{"l.xori", "rD,rA,I", "10 0xB DDDDD AAAAA IIII IIII IIII IIII",`