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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
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| Rev 230 |
Rev 240 |
| Line 667... |
Line 667... |
}
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}
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enc += 3;
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enc += 3;
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}
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}
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else
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else
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{
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{
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if (*enc == '0' || *enc == '1' || *enc == '-' || isalpha (*enc))
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if (*enc == '0' || *enc == '1' || *enc == '-' || isalpha ((int)*enc))
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{
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{
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opc_pos--;
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opc_pos--;
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if (param_ch == *enc)
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if (param_ch == *enc)
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ret |= 1 << opc_pos;
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ret |= 1 << opc_pos;
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}
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}
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| Line 865... |
Line 865... |
args++;
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args++;
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type |= OPTYPE_REG;
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type |= OPTYPE_REG;
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if (*args == 'D')
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if (*args == 'D')
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type |= OPTYPE_DST;
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type |= OPTYPE_DST;
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}
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}
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else if (isalpha (*args))
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else if (isalpha ((int)*args))
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{
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{
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unsigned long arg;
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unsigned long arg;
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arg = insn_extract (*args, opcode->encoding);
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arg = insn_extract (*args, opcode->encoding);
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or32_debug (9, "%s : %08lX ------\n", opcode->name, arg);
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or32_debug (9, "%s : %08lX ------\n", opcode->name, arg);
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if (letter_signed (*args))
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if (letter_signed (*args))
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| Line 1161... |
Line 1161... |
param_pos--;
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param_pos--;
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#if DEBUG
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#if DEBUG
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printf ("\n ret=%x opc_pos=%x, param_pos=%x\n", ret, opc_pos,
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printf ("\n ret=%x opc_pos=%x, param_pos=%x\n", ret, opc_pos,
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param_pos);
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param_pos);
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#endif
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#endif
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if (islower (param_ch))
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if (islower ((int) param_ch))
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ret -= ((insn >> opc_pos) & 0x1) << param_pos;
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ret -= ((insn >> opc_pos) & 0x1) << param_pos;
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else
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else
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ret += ((insn >> opc_pos) & 0x1) << param_pos;
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ret += ((insn >> opc_pos) & 0x1) << param_pos;
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enc++;
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enc++;
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}
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}
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else if (isalpha (*enc))
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else if (isalpha ((int)*enc))
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{
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{
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opc_pos--;
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opc_pos--;
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enc++;
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enc++;
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}
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}
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else if (*enc == '-')
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else if (*enc == '-')
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