URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
[/] [openrisc/] [trunk/] [or1ksim/] [doc/] [or1ksim.texi] - Diff between revs 98 and 100
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
| Rev 98 |
Rev 100 |
| Line 1313... |
Line 1313... |
disable the store buffer.
|
disable the store buffer.
|
|
|
When the store buffer is active, stores are accumulated and committed
|
When the store buffer is active, stores are accumulated and committed
|
when I/O is idle.
|
when I/O is idle.
|
|
|
|
@item hardfloat = 0|1
|
|
@cindex @code{hardfloat} (CPU configuration)
|
|
If 1, hardfloat instructions are enabled. Default value 0.
|
@end table
|
@end table
|
|
|
@node Memory Configuration
|
@node Memory Configuration
|
@subsection Memory Configuration
|
@subsection Memory Configuration
|
@cindex configuring memory
|
@cindex configuring memory
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.
