URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
[/] [openrisc/] [trunk/] [or1ksim/] [doc/] [or1ksim.texi] - Diff between revs 418 and 420
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 418 |
Rev 420 |
Line 405... |
Line 405... |
Generate extra output messages (equivalent of specifying the ``verbose''
|
Generate extra output messages (equivalent of specifying the ``verbose''
|
option in the simulator configuration section (see @pxref{Simulator Behavior, , Simulator Behavior}).
|
option in the simulator configuration section (see @pxref{Simulator Behavior, , Simulator Behavior}).
|
|
|
@item -t
|
@item -t
|
@itemx --trace
|
@itemx --trace
|
@cindex @code{-V}
|
@cindex @code{-t}
|
@cindex @code{--verbose}
|
@cindex @code{--trace}
|
Dump previous instruction, next instruction, GPRs and flag after each
|
Dump instruction just executed and any register/memory location chaged
|
instruction.
|
after each instruction (one line per instruction).
|
|
|
@item -f @var{file}
|
@item -f @var{file}
|
@itemx --file=@var{file}
|
@itemx --file=@var{file}
|
@cindex @code{-f}
|
@cindex @code{-f}
|
@cindex @code{--file}
|
@cindex @code{--file}
|
Line 1603... |
Line 1603... |
@cindex @code{type=exitnops} (memory configuration)
|
@cindex @code{type=exitnops} (memory configuration)
|
Set the memory values to be an instruction used to signal end of
|
Set the memory values to be an instruction used to signal end of
|
simulation. This is useful for causing immediate end of simulation
|
simulation. This is useful for causing immediate end of simulation
|
when PC corruption occurs.
|
when PC corruption occurs.
|
|
|
|
|
@end table
|
@end table
|
|
|
@item random_seed = @var{value}
|
@item random_seed = @var{value}
|
@cindex @code{random_seed} (memory configuration)
|
@cindex @code{random_seed} (memory configuration)
|
Set the seed for the random number generator to @var{value}. This only
|
Set the seed for the random number generator to @var{value}. This only
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.