Line 69... |
Line 69... |
#ifndef ETH_DEBUG
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#ifndef ETH_DEBUG
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# define ETH_DEBUG 1
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# define ETH_DEBUG 1
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#endif
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#endif
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/*! Period (clock cycles) for rescheduling Rx and Tx controllers. */
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/*! Period (clock cycles) for rescheduling Rx and Tx controllers. */
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#define RTX_RESCHED_PERIOD 1
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#define RTX_RESCHED_PERIOD 10000
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/*! MAC address that is always accepted. */
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/*! MAC address that is always accepted. */
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static const unsigned char mac_broadcast[ETHER_ADDR_LEN] =
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static const unsigned char mac_broadcast[ETHER_ADDR_LEN] =
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{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
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{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
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Line 1369... |
Line 1369... |
{
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{
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struct eth_device *eth = dat;
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struct eth_device *eth = dat;
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#if ETH_DEBUG
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#if ETH_DEBUG
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/* Only trace registers of particular interest */
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/* Only trace registers of particular interest */
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switch (addr)
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switch (addr)
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{
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{
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case ETH_MODER:
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case ETH_MODER:
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case ETH_INT_SOURCE:
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case ETH_INT_SOURCE:
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case ETH_INT_MASK:
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case ETH_INT_MASK:
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Line 1383... |
Line 1384... |
case ETH_COLLCONF:
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case ETH_COLLCONF:
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case ETH_TX_BD_NUM:
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case ETH_TX_BD_NUM:
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case ETH_CTRLMODER:
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case ETH_CTRLMODER:
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case ETH_MAC_ADDR0:
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case ETH_MAC_ADDR0:
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case ETH_MAC_ADDR1:
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case ETH_MAC_ADDR1:
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printf ("eth_write32: %s = 0x%08lx\n", eth_regname (addr),
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printf ("eth_write32: 0x%08lx to %s ", (unsigned long) value,
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(unsigned long int) value);
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eth_regname (addr));
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}
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/* Detail register transitions on MODER, INT_SOURCE AND INT_MASK */
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switch (addr)
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{
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case ETH_MODER:
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printf("0x%08lx -> ", (unsigned long) eth->regs.moder);
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break;
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case ETH_INT_SOURCE:
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printf("0x%08lx -> ", (unsigned long) eth->regs.int_source);
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break;
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case ETH_INT_MASK:
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printf("0x%08lx -> ", (unsigned long) eth->regs.int_mask);
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break;
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}
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}
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#endif
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#endif
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switch (addr)
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switch (addr)
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{
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{
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case ETH_MODER:
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case ETH_MODER:
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Line 1524... |
Line 1544... |
"Warning: eth_write32( 0x%" PRIxADDR " ): Illegal address\n",
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"Warning: eth_write32( 0x%" PRIxADDR " ): Illegal address\n",
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addr + eth->baseaddr);
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addr + eth->baseaddr);
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}
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}
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break;
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break;
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}
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}
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#if ETH_DEBUG
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switch (addr)
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{
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case ETH_MODER:
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printf("0x%08lx", (unsigned long) eth->regs.moder);
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break;
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case ETH_INT_SOURCE:
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printf("0x%08lx", (unsigned long) eth->regs.int_source);
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break;
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case ETH_INT_MASK:
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printf("0x%08lx", (unsigned long) eth->regs.int_mask);
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break;
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case ETH_IPGT:
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case ETH_IPGR1:
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case ETH_IPGR2:
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case ETH_PACKETLEN:
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case ETH_COLLCONF:
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case ETH_TX_BD_NUM:
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case ETH_CTRLMODER:
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case ETH_MAC_ADDR0:
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case ETH_MAC_ADDR1:
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break;
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}
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printf("\n");
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#endif
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} /* eth_write32 () */
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} /* eth_write32 () */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/*!Enable or disable the Ethernet interface
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/*!Enable or disable the Ethernet interface
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