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Rev 385 |
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#define MC_CSC_MEMTYPE_SDRAM 0
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#define MC_CSC_MEMTYPE_SDRAM 0
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#define MC_CSC_MEMTYPE_SSRAM 1
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#define MC_CSC_MEMTYPE_SSRAM 1
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#define MC_CSC_MEMTYPE_ASYNC 2
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#define MC_CSC_MEMTYPE_ASYNC 2
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#define MC_CSC_MEMTYPE_SYNC 3
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#define MC_CSC_MEMTYPE_SYNC 3
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#define MC_CE_VALID (N_CE - 1)
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#define MC_CSR_VALID 0xFF000703LU
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#define MC_CSR_VALID 0xFF000703LU
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#define MC_POC_VALID 0x0000000FLU
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#define MC_POC_VALID 0x0000000FLU
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#define MC_BA_MASK_VALID 0x000003FFLU
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#define MC_BA_MASK_VALID 0x000003FFLU
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#define MC_CSC_VALID 0x00FF0FFFLU
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#define MC_CSC_VALID 0x00FF0FFFLU
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#define MC_TMS_SDRAM_VALID 0x0FFF83FFLU
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#define MC_TMS_SDRAM_VALID 0x0FFF83FFLU
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