URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [peripheral/] [mc.c] - Diff between revs 82 and 98

Rev 82	Rev 98
Line 92...	Line 92...
`{`	`{`
`if (cur->cs == cs)`	`if (cur->cs == cs)`
`{`	`{`
`/* FIXME: No peripheral should _ever_ acess a dev_memarea structure`	`/* FIXME: No peripheral should _ever_ acess a dev_memarea structure`
`* directly */`	`* directly */`
	`printf ("mem->addr_mask 0x%08lx, ba_mask 0x%08lx\n",`
	`(unsigned long int) cur->mem->addr_mask,`
	`(unsigned long int) mc->ba_mask);`

`cur->mem->addr_mask = mc->ba_mask << 22;`	`cur->mem->addr_mask = mc->ba_mask << 22;`
`cur->mem->addr_compare =`	`cur->mem->addr_compare =`
`((csc >> MC_CSC_SEL_OFFSET) /* & 0xff */ ) << 22;`	`((csc >> MC_CSC_SEL_OFFSET) /* & 0xff */ ) << 22;`
`set_mem_valid (cur->mem, (csc >> MC_CSC_EN_OFFSET) & 0x01);`	`set_mem_valid (cur->mem, (csc >> MC_CSC_EN_OFFSET) & 0x01);`