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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [sim-config.h] - Diff between revs 472 and 556

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Rev 472 Rev 556
Line 150... Line 150...
    int enabled;                /* Is power management operational? */
    int enabled;                /* Is power management operational? */
  } pm;
  } pm;
 
 
  struct
  struct
  {
  {
 
    int enabled;                /* Are performance counters enabled? */
 
  } pcu;
 
 
 
  struct
 
  {
    int enabled;                /* branch prediction buffer analysis */
    int enabled;                /* branch prediction buffer analysis */
    int sbp_bnf_fwd;            /* Static BP for l.bnf uses fwd predn */
    int sbp_bnf_fwd;            /* Static BP for l.bnf uses fwd predn */
    int sbp_bf_fwd;             /* Static BP for l.bf uses fwd predn */
    int sbp_bf_fwd;             /* Static BP for l.bf uses fwd predn */
    int btic;                   /* BP target insn cache analysis */
    int btic;                   /* BP target insn cache analysis */
    int missdelay;              /* How much cycles does the miss cost */
    int missdelay;              /* How much cycles does the miss cost */

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