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[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [fp/] [fp.S] - Diff between revs 458 and 787

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Rev 458 Rev 787
Line 351... Line 351...
 * ------------------------------------------------------------------------- */
 * ------------------------------------------------------------------------- */
        .section .except,"ax"
        .section .except,"ax"
 
 
        .org 0x100
        .org 0x100
_reset:
_reset:
 
    // Clear R0 on start-up. There is no guarantee that R0 is hardwired to zero,
 
    // and indeed it is not when simulating the or1200 Verilog core.
 
    l.andi  r0,r0,0x0
 
 
        l.movhi r1,hi(_stack)           /* Set up the stack */
        l.movhi r1,hi(_stack)           /* Set up the stack */
        l.ori   r1,r1,lo(_stack)
        l.ori   r1,r1,lo(_stack)
 
 
        l.movhi r3,hi(start)            /* Jump to test start */
        l.movhi r3,hi(start)            /* Jump to test start */
        l.ori   r3,r3,lo(start)
        l.ori   r3,r3,lo(start)

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