URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [tick/] [tick.c] - Diff between revs 90 and 458

Rev 90	Rev 458
Line 248...	Line 248...
`}`	`}`

`/* Allow MAX_SPURIOUS spurious spurious interrupt */`	`/* Allow MAX_SPURIOUS spurious spurious interrupt */`
`if (++tick_cnt == MAX_SPURIOUS)`	`if (++tick_cnt == MAX_SPURIOUS)`
`{`	`{`
`ttmr &= ~SPR_TTMR_IE;`	`/* Clear mode register completely */`
	`ttmr = 0;`
`mtspr (SPR_TTMR, ttmr);`	`mtspr (SPR_TTMR, ttmr);`


`}`	`}`
`} /* tick_int_spurious () */`	`} /* tick_int_spurious () */`


`/* --------------------------------------------------------------------------*/`	`/* --------------------------------------------------------------------------*/`
Line 572...	Line 575...

`/* Set countinous counter, but make sure we never clear the TTMR_IP bit */`	`/* Set countinous counter, but make sure we never clear the TTMR_IP bit */`
`tick_cnt = 0;`	`tick_cnt = 0;`
`clear_ip = 0;`	`clear_ip = 0;`

`ttcr = clear_ttcr ();`	`clear_ttcr ();`
`ttmr = new_timer (0x100, SPR_TTMR_CR, SPR_TTMR_IE);`	`ttmr = new_timer (0x100, SPR_TTMR_CR, SPR_TTMR_IE);`

`while(tick_cnt != MAX_SPURIOUS)`	`while(tick_cnt != MAX_SPURIOUS)`
`{`	`{`
`}`	`}`