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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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Line 41... |
Line 41... |
{
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{
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/* Call inf routine */
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/* Call inf routine */
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(*tick_inf)();
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(*tick_inf)();
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/* Set new counter period iand clear inet pending bit */
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/* Set new counter period iand clear inet pending bit */
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mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (tick_period & SPR_TTMR_PERIOD));
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mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (tick_period & SPR_TTMR_TP));
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}
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}
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/* Initialize routine */
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/* Initialize routine */
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int tick_init(unsigned long period, void (* inf)())
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int tick_init(unsigned long period, void (* inf)())
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{
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{
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/* Save tick timer period and inform routine */
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/* Save tick timer period and inform routine */
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tick_period = period;
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tick_period = period;
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tick_inf = inf;
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tick_inf = inf;
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/* Set counter period, enable timer and interrupt */
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/* Set counter period, enable timer and interrupt */
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mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (period & SPR_TTMR_PERIOD));
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mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (period & SPR_TTMR_TP));
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return 0;
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return 0;
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}
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}
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