OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [toplevel-support.c] - Diff between revs 19 and 202

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 19 Rev 202
Line 273... Line 273...
          perror (NULL);
          perror (NULL);
          exit (1);
          exit (1);
        }
        }
    }
    }
 
 
 
  if (config.sim.exe_bin_insn_log)
 
    {
 
      runtime.sim.fexe_bin_insn_log = fopen (config.sim.exe_bin_insn_log_fn, "wb+");
 
      if (!runtime.sim.fexe_bin_insn_log)
 
        {
 
          fprintf (stderr, "sim_init: cannot open binary instruction execution log file %s: ",
 
                   config.sim.exe_bin_insn_log_fn);
 
          perror (NULL);
 
          exit (1);
 
        }
 
    }
 
 
  /* MM170901 always load at address zero */
  /* MM170901 always load at address zero */
  if (runtime.sim.filename)
  if (runtime.sim.filename)
    {
    {
      unsigned long endaddr = loadcode (runtime.sim.filename, 0, 0);
      unsigned long endaddr = loadcode (runtime.sim.filename, 0, 0);
 
 
Line 393... Line 405...
  if (config.sim.exe_log)
  if (config.sim.exe_log)
    {
    {
      fclose (runtime.sim.fexe_log);
      fclose (runtime.sim.fexe_log);
    }
    }
 
 
 
  if (config.sim.exe_bin_insn_log)
 
    {
 
      fclose (runtime.sim.fexe_bin_insn_log);
 
    }
 
 
  if (runtime.vapi.enabled)
  if (runtime.vapi.enabled)
    {
    {
      vapi_done ();
      vapi_done ();
    }
    }
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.