| Line 205... |
Line 205... |
exit(-1);
|
exit(-1);
|
return 0;
|
return 0;
|
}
|
}
|
|
|
|
|
|
|
int dbg_reset()
|
int dbg_reset()
|
{
|
{
|
#ifdef USB_ENDPOINT_ENABLED
|
#ifdef USB_ENDPOINT_ENABLED
|
if (endpoint_target == ENDPOINT_TARGET_USB) return usb_dbg_reset();
|
if (endpoint_target == ENDPOINT_TARGET_USB) return usb_dbg_reset();
|
#endif
|
#endif
|
| Line 326... |
Line 325... |
if (endpoint_target == ENDPOINT_TARGET_VPI) return vpi_dbg_wb_read_block32( adr, data, len);
|
if (endpoint_target == ENDPOINT_TARGET_VPI) return vpi_dbg_wb_read_block32( adr, data, len);
|
#endif
|
#endif
|
return DBG_ERR_INVALID_ENDPOINT;
|
return DBG_ERR_INVALID_ENDPOINT;
|
}
|
}
|
|
|
|
|
/* write a block to wishbone */
|
/* write a block to wishbone */
|
int dbg_wb_write_block32(uint32_t adr, uint32_t *data, uint32_t len) {
|
int dbg_wb_write_block32(uint32_t adr, uint32_t *data, uint32_t len) {
|
#ifdef USB_ENDPOINT_ENABLED
|
#ifdef USB_ENDPOINT_ENABLED
|
if (endpoint_target == ENDPOINT_TARGET_USB) return usb_dbg_wb_write_block32( adr, data, len);
|
if (endpoint_target == ENDPOINT_TARGET_USB) return usb_dbg_wb_write_block32( adr, data, len);
|
#endif
|
#endif
|
| Line 339... |
Line 337... |
#endif
|
#endif
|
return DBG_ERR_INVALID_ENDPOINT;
|
return DBG_ERR_INVALID_ENDPOINT;
|
}
|
}
|
|
|
/* read a register from cpu */
|
/* read a register from cpu */
|
int dbg_cpu0_read(uint32_t adr, uint32_t *data) {
|
int dbg_cpu0_read(uint32_t adr, uint32_t *data, uint32_t length) {
|
#ifdef USB_ENDPOINT_ENABLED
|
#ifdef USB_ENDPOINT_ENABLED
|
if (endpoint_target == ENDPOINT_TARGET_USB) return usb_dbg_cpu0_read( adr, data);
|
if (endpoint_target == ENDPOINT_TARGET_USB) return usb_dbg_cpu0_read( adr, data, length);
|
#endif
|
#endif
|
#ifdef VPI_ENDPOINT_ENABLED
|
#ifdef VPI_ENDPOINT_ENABLED
|
if (endpoint_target == ENDPOINT_TARGET_VPI) return vpi_dbg_cpu0_read( adr, data);
|
if (endpoint_target == ENDPOINT_TARGET_VPI) return vpi_dbg_cpu0_read( adr, data);
|
#endif
|
#endif
|
return DBG_ERR_INVALID_ENDPOINT;
|
return DBG_ERR_INVALID_ENDPOINT;
|
}
|
}
|
|
|
/* write a cpu register */
|
/* write a cpu register */
|
int dbg_cpu0_write(uint32_t adr, uint32_t data) {
|
int dbg_cpu0_write(uint32_t adr, uint32_t *data, uint32_t length) {
|
#ifdef USB_ENDPOINT_ENABLED
|
#ifdef USB_ENDPOINT_ENABLED
|
if (endpoint_target == ENDPOINT_TARGET_USB) return usb_dbg_cpu0_write( adr, data);
|
if (endpoint_target == ENDPOINT_TARGET_USB) return usb_dbg_cpu0_write( adr, data, length);
|
#endif
|
#endif
|
#ifdef VPI_ENDPOINT_ENABLED
|
#ifdef VPI_ENDPOINT_ENABLED
|
if (endpoint_target == ENDPOINT_TARGET_VPI) return vpi_dbg_cpu0_write( adr, data);
|
if (endpoint_target == ENDPOINT_TARGET_VPI) return vpi_dbg_cpu0_write( adr, data);
|
#endif
|
#endif
|
return DBG_ERR_INVALID_ENDPOINT;
|
return DBG_ERR_INVALID_ENDPOINT;
|
