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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [include/] [DebugUnitSC.h] - Diff between revs 64 and 462

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Line 27... Line 27...
// $Id$
// $Id$
 
 
#ifndef DEBUG_UNIT_SC__H
#ifndef DEBUG_UNIT_SC__H
#define DEBUG_UNIT_SC__H
#define DEBUG_UNIT_SC__H
 
 
 
 
// Define if no cache is wanted
// Define if no cache is wanted
#define NOCACHE
#define NOCACHE
 
 
#include <stdint.h>
#include <stdint.h>
 
 
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#include "JtagSC_includes.h"
#include "JtagSC_includes.h"
#include "OrpsocAccess.h"
#include "OrpsocAccess.h"
#include "SprCache.h"
#include "SprCache.h"
#include "MemCache.h"
#include "MemCache.h"
 
 
 
 
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
//! Module modeling the OpenRISC 1000 Debug Unit
//! Module modeling the OpenRISC 1000 Debug Unit
 
 
//! Provides a high level interface to the GDB Server module with functions to
//! Provides a high level interface to the GDB Server module with functions to
//! access SPRs, Wishbone memory and CPU control.
//! access SPRs, Wishbone memory and CPU control.
 
 
//! Provides a low level interface to the Embecosm SystemC JTAG interface,
//! Provides a low level interface to the Embecosm SystemC JTAG interface,
//! queueing requests to read and write JTAG registers.
//! queueing requests to read and write JTAG registers.
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
class DebugUnitSC
class DebugUnitSC:public sc_core::sc_module {
  : public sc_core::sc_module
 
{
 
public:
public:
 
 
  // Constructor and destructor
  // Constructor and destructor
  DebugUnitSC (sc_core::sc_module_name        name,
  DebugUnitSC (sc_core::sc_module_name        name,
               sc_core::sc_fifo<TapAction *> *_tapActionQueue);
                    sc_core::sc_fifo < TapAction * >*_tapActionQueue);
  ~DebugUnitSC ();
  ~DebugUnitSC ();
 
 
  // Reset function for the debug unit
  // Reset function for the debug unit
  void      resetDebugUnit ();
  void      resetDebugUnit ();
 
 
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  void      unstall ();
  void      unstall ();
  bool      isStalled ();
  bool      isStalled ();
 
 
  // Functions to access SPRs
  // Functions to access SPRs
  uint32_t  readSpr (uint16_t  sprNum);
  uint32_t  readSpr (uint16_t  sprNum);
  void      writeSpr (uint16_t  sprNum,
        void writeSpr(uint16_t sprNum, uint32_t value);
                      uint32_t  value);
        void andSpr(uint16_t sprNum, uint32_t value);
  void      andSpr (uint16_t  sprNum,
        void orSpr(uint16_t sprNum, uint32_t value);
                    uint32_t  value);
 
  void      orSpr (uint16_t  sprNum,
 
                   uint32_t  value);
 
 
 
  // Functions to access memory
  // Functions to access memory
  uint32_t  readMem32 (uint32_t  addr);
  uint32_t  readMem32 (uint32_t  addr);
  bool      writeMem32 (uint32_t  addr,
        bool writeMem32(uint32_t addr, uint32_t value);
                        uint32_t   value);
 
  uint8_t   readMem8 (uint32_t  addr);
  uint8_t   readMem8 (uint32_t  addr);
  bool      writeMem8 (uint32_t  addr,
        bool writeMem8(uint32_t addr, uint8_t value);
                       uint8_t   value);
 
 
 
private:
private:
 
 
  // JTAG instructions
  // JTAG instructions
  static const uint32_t  CHAIN_SELECT_IR = 0x3;  //!< Chain Select instruction
  static const uint32_t  CHAIN_SELECT_IR = 0x3;  //!< Chain Select instruction
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  static const int  DUSEL_OPCODE_LEN =  4;  //!< length of opcode field
  static const int  DUSEL_OPCODE_LEN =  4;  //!< length of opcode field
  static const int  DUSEL_CRC_OFF    =  DUSEL_OPCODE_OFF + DUSEL_OPCODE_LEN;  //!< start of CRC field
  static const int  DUSEL_CRC_OFF    =  DUSEL_OPCODE_OFF + DUSEL_OPCODE_LEN;  //!< start of CRC field
  static const int  DUSEL_CRC_LEN    = 32;  //!< length of CRC field
  static const int  DUSEL_CRC_LEN    = 32;  //!< length of CRC field
  static const int  DUSEL_RESP_STATUS_OFF = DUSEL_CRC_OFF + DUSEL_CRC_LEN;
  static const int  DUSEL_RESP_STATUS_OFF = DUSEL_CRC_OFF + DUSEL_CRC_LEN;
  static const int  DUSEL_RESP_STATUS_LEN = 4;
  static const int  DUSEL_RESP_STATUS_LEN = 4;
  static const int  DUSEL_RESP_CRC_OFF = DUSEL_RESP_STATUS_OFF + DUSEL_RESP_STATUS_LEN;
        static const int DUSEL_RESP_CRC_OFF =
 
            DUSEL_RESP_STATUS_OFF + DUSEL_RESP_STATUS_LEN;
  static const int  DUSEL_RESP_CRC_LEN = 32;
  static const int  DUSEL_RESP_CRC_LEN = 32;
 
 
  static const uint32_t  DBG_CRC32_POLY = 0x04c11db7;
  static const uint32_t  DBG_CRC32_POLY = 0x04c11db7;
 
 
  // OpenRISC 1000 scan chains (values in DUSEL data register field)
  // OpenRISC 1000 scan chains (values in DUSEL data register field)
  static const int  OR1K_SC_UNDEF      = -1;    //!< Undefined OR1K scan chain
  static const int  OR1K_SC_UNDEF      = -1;    //!< Undefined OR1K scan chain
  static const int  OR1K_SC_WISHBONE   =  0;     //!< for memory access
  static const int  OR1K_SC_WISHBONE   =  0;     //!< for memory access
  static const int  OR1K_SC_CPU0 =  1;          //!< for access to CPU0
  static const int  OR1K_SC_CPU0 =  1;          //!< for access to CPU0
  static const int  OR1K_SC_CPU1 =  2;          //!< for access to CPU1
  static const int  OR1K_SC_CPU1 =  2;          //!< for access to CPU1
 
 
 
 
 
 
  // JTAG RISC_DEBUG (for accessing SPR) data register fields
  // JTAG RISC_DEBUG (for accessing SPR) data register fields
  static const int  RISC_DEBUG_DR_LEN    = 74;  //!< Total RISC_DEBUG DR size
  static const int  RISC_DEBUG_DR_LEN    = 74;  //!< Total RISC_DEBUG DR size
  static const int  RISC_DEBUG_ADDR_OFF  =  0;   //!< start of address field
  static const int  RISC_DEBUG_ADDR_OFF  =  0;   //!< start of address field
  static const int  RISC_DEBUG_ADDR_LEN  = 32;  //!< length of address field
  static const int  RISC_DEBUG_ADDR_LEN  = 32;  //!< length of address field
  static const int  RISC_DEBUG_RW_OFF    = 32;  //!< start of read/write field
  static const int  RISC_DEBUG_RW_OFF    = 32;  //!< start of read/write field
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  //! The NPC is special, so we need to know about it
  //! The NPC is special, so we need to know about it
  static const int  SPR_NPC = 0x10;
  static const int  SPR_NPC = 0x10;
 
 
  //! The JTAG fifo we queue on
  //! The JTAG fifo we queue on
  sc_core::sc_fifo<TapAction *> *tapActionQueue;
        sc_core::sc_fifo < TapAction * >*tapActionQueue;
 
 
  //! The processor stall state. When stalled we can use cacheing on
  //! The processor stall state. When stalled we can use cacheing on
  //! reads/writes of memory and SPRs.
  //! reads/writes of memory and SPRs.
  enum {
  enum {
    UNKNOWN,
    UNKNOWN,
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  void      writeRiscop (uint32_t  value);
  void      writeRiscop (uint32_t  value);
 
 
  // Or1k JTAG actions
  // Or1k JTAG actions
  void      selectDebugModule (int chain);
  void      selectDebugModule (int chain);
  uint32_t  readJtagReg (uint32_t  addr);
  uint32_t  readJtagReg (uint32_t  addr);
  uint32_t  readJtagReg1 (uint32_t   addr,
        uint32_t readJtagReg1(uint32_t addr, int bitSizeNoCrc);
                          int        bitSizeNoCrc);
 
  uint32_t  readJtagReg1 (uint64_t  *dRegArray,
  uint32_t  readJtagReg1 (uint64_t  *dRegArray,
                          uint32_t   addr,
                              uint32_t addr, int bitSizeNoCrc);
                          int        bitSizeNoCrc);
        void writeJtagReg(uint32_t addr, uint32_t data);
  void      writeJtagReg (uint32_t  addr,
 
                          uint32_t  data);
 
 
 
  // Utilities to pack and unpack bits to/from data registers.
  // Utilities to pack and unpack bits to/from data registers.
  void clearBits (uint64_t  regArray[],
        void clearBits(uint64_t regArray[], int regBits);
                  int       regBits);
 
 
 
  void packBits (uint64_t  regArray[],
  void packBits (uint64_t  regArray[],
                 int       fieldOffset,
                      int fieldOffset, int fieldBits, uint64_t fieldVal);
                 int       fieldBits,
 
                 uint64_t  fieldVal);
 
 
 
  uint64_t  unpackBits (uint64_t  regArray[],
  uint64_t  unpackBits (uint64_t  regArray[],
                        int       fieldOffset,
                            int fieldOffset, int fieldBits);
                        int       fieldBits);
 
 
 
  // Utility to compute CRC-8 the OpenRISC way.
  // Utility to compute CRC-8 the OpenRISC way.
  uint8_t  crc8 (uint64_t  dataArray[],
        uint8_t crc8(uint64_t dataArray[], int size);
                 int       size);
 
 
 
  // Utility to compute CRC-32 for the debug unit
  // Utility to compute CRC-32 for the debug unit
  uint32_t  crc32 (uint64_t  dataArray[],
        uint32_t crc32(uint64_t dataArray[], int size, int offset);
                   int       size,
 
                   int       offset);
 
 
 
  // Functions to bitreverse values
  // Functions to bitreverse values
  uint32_t bit_reverse_swar_2(uint32_t x);
  uint32_t bit_reverse_swar_2(uint32_t x);
  uint32_t bit_reverse_swar_4(uint32_t x);
  uint32_t bit_reverse_swar_4(uint32_t x);
  uint32_t bit_reverse_swar_8(uint32_t x);
  uint32_t bit_reverse_swar_8(uint32_t x);
  uint32_t bit_reverse_swar_16(uint32_t x);
  uint32_t bit_reverse_swar_16(uint32_t x);
  uint32_t bit_reverse_swar_32(uint32_t x);
  uint32_t bit_reverse_swar_32(uint32_t x);
#define BITREV(x,y) bit_reverse_data(x,y)
#define BITREV(x,y) bit_reverse_data(x,y)
  uint32_t bit_reverse_data(uint32_t x, int length);
  uint32_t bit_reverse_data(uint32_t x, int length);
 
 
 
 
 
 
};      // DebugUnitSC ()
};      // DebugUnitSC ()
 
 
#endif  // DEBUG_UNIT_SC__H
#endif  // DEBUG_UNIT_SC__H
 
 
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