OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [include/] [Or1200MonitorSC.h] - Diff between revs 49 and 51

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 49 Rev 51
Line 23... Line 23...
// You should have received a copy of the GNU Lesser General Public License
// You should have received a copy of the GNU Lesser General Public License
// along with this program.  If not, see <http://www.gnu.org/licenses/>.
// along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
 
 
// $Id: Or1200MonitorSC.h 288 2009-02-03 15:08:00Z jeremy $
// $Id$
 
 
#ifndef OR1200_MONITOR_SC__H
#ifndef OR1200_MONITOR_SC__H
#define OR1200_MONITOR_SC__H
#define OR1200_MONITOR_SC__H
 
 
#include <fstream>
#include <fstream>
#include <ctime>
#include <ctime>
 
 
#include "systemc.h"
#include "systemc.h"
 
 
#include "OrpsocAccess.h"
#include "OrpsocAccess.h"
 
#include "MemoryLoad.h"
 
 
//! Monitor for special l.nop instructions
//! Monitor for special l.nop instructions
 
 
//! This class is based on the or1200_monitor.v of the Verilog test bench. It
//! This class is based on the or1200_monitor.v of the Verilog test bench. It
//! wakes up on each posedge clock to check for "special" l.nop instructions,
//! wakes up on each posedge clock to check for "special" l.nop instructions,
Line 50... Line 50...
public:
public:
 
 
  // Constructor
  // Constructor
  Or1200MonitorSC (sc_core::sc_module_name  name,
  Or1200MonitorSC (sc_core::sc_module_name  name,
                   OrpsocAccess            *_accessor,
                   OrpsocAccess            *_accessor,
 
                   MemoryLoad              *_memoryload,
                   int argc,
                   int argc,
                   char *argv[]);
                   char *argv[]);
 
 
  // Method to check instructions
  // Method to check instructions
  void  checkInstruction();
  void  checkInstruction();
 
 
  // Methods to setup and output state of processor to a file
  // Methods to setup and output state of processor to a file
  void displayState();
  void displayState();
 
 
  // Function to calculate performance of the sim
  // Methods to generate the call and return list during execution
 
  void callLog();
 
 
 
  // Method to calculate performance of the sim
  void perfSummary();
  void perfSummary();
 
 
  // Print out the command-line switches for this module's options  
  // Method to print out the command-line switches for this module's options  
  void printSwitches();
  void printSwitches();
 
 
  // Print out the usage for each option
  // Method to print out the usage for each option
  void printUsage();
  void printUsage();
 
 
  // The ports
  // The ports
  sc_in<bool>   clk;
  sc_in<bool>   clk;
 
 
private:
private:
 
 
 
#define DEFAULT_PROF_FILE "sim.profile"
 
 
  // Special NOP instructions
  // Special NOP instructions
  static const uint32_t NOP_NOP    = 0x15000000;  //!< Normal nop instruction
  static const uint32_t NOP_NOP    = 0x15000000;  //!< Normal nop instruction
  static const uint32_t NOP_EXIT   = 0x15000001;  //!< End of simulation
  static const uint32_t NOP_EXIT   = 0x15000001;  //!< End of simulation
  static const uint32_t NOP_REPORT = 0x15000002;  //!< Simple report
  static const uint32_t NOP_REPORT = 0x15000002;  //!< Simple report
  static const uint32_t NOP_PRINTF = 0x15000003;  //!< Simprintf instruction
  static const uint32_t NOP_PRINTF = 0x15000003;  //!< Simprintf instruction
  static const uint32_t NOP_PUTC   = 0x15000004;  //!< Putc instruction
  static const uint32_t NOP_PUTC   = 0x15000004;  //!< Putc instruction
 
 
  // Variables for processor status output
  // Variables for processor status output
  ofstream statusFile;
  ofstream statusFile;
 
  ofstream profileFile;
  int logging_enabled;
  int logging_enabled;
  int exit_perf_summary_enabled;
  int exit_perf_summary_enabled;
  int insn_count;
  int insn_count;
 
  long long cycle_count;
 
 
  // Time measurement variables - for calculating performance of the sim
  //! Time measurement variable - for calculating performance of the sim
  clock_t start;
  clock_t start;
 
 
  //! The accessor for the Orpsoc instance
  //! The accessor for the Orpsoc instance
  OrpsocAccess *accessor;
  OrpsocAccess *accessor;
 
 
 
  //! The memory loading object
 
  MemoryLoad *memoryload;
 
 
};      // Or1200MonitorSC ()
};      // Or1200MonitorSC ()
 
 
#endif  // OR1200_MONITOR_SC__H
#endif  // OR1200_MONITOR_SC__H
 
 
 No newline at end of file
 No newline at end of file

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.