URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 63 |
Rev 66 |
Line 75... |
Line 75... |
uint32_t getSprEpcr ();
|
uint32_t getSprEpcr ();
|
uint32_t getSprEear ();
|
uint32_t getSprEear ();
|
uint32_t getSprEsr ();
|
uint32_t getSprEsr ();
|
|
|
// Wishbone SRAM accessor functions
|
// Wishbone SRAM accessor functions
|
uint32_t get_mem (uint32_t addr);
|
uint32_t get_mem32 (uint32_t addr);
|
void set_mem (uint32_t addr, uint32_t data);
|
uint8_t get_mem8 (uint32_t addr);
|
|
|
|
void set_mem32 (uint32_t addr, uint32_t data);
|
// Trigger a $readmemh for the RAM array
|
// Trigger a $readmemh for the RAM array
|
void do_ram_readmemh (void);
|
void do_ram_readmemh (void);
|
|
|
// Arbiter access functions
|
// Arbiter access functions
|
uint8_t getWbArbGrant ();
|
uint8_t getWbArbGrant ();
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.