URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [include/] [OrpsocMain.h] - Diff between revs 6 and 52

Rev 6	Rev 52
Line 53...	Line 53...
`#define BENCH_RESET_TIME 10`	`#define BENCH_RESET_TIME 10`

`//! CPU clock Half period in timescale units`	`//! CPU clock Half period in timescale units`
`#define BENCH_CLK_HALFPERIOD 20`	`#define BENCH_CLK_HALFPERIOD 20`

	`//! System's internal RAM size in byes - found in rtl/verilog/orpsoc_top.v, param for ram_wb module`
	`//! Currently is 32MB (8M words)`
	`#define ORPSOC_SRAM_SIZE (8388608*4)`

`#endif // ORPSOC_MAIN__H`	`#endif // ORPSOC_MAIN__H`

`No newline at end of file`	`No newline at end of file`