URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [include/] [ResetSC.h] - Diff between revs 6 and 462

Rev 6	Rev 462
Line 29...	Line 29...
`#ifndef RESET_SC__H`	`#ifndef RESET_SC__H`
`#define RESET_SC__H`	`#define RESET_SC__H`

`#include "systemc"`	`#include "systemc"`


`//! Provide a SystemC reset signal at startup`	`//! Provide a SystemC reset signal at startup`

`//! The reset signal is driven for a specified number of cycles after`	`//! The reset signal is driven for a specified number of cycles after`
`//! creation. For convenience synchronous versions of the reset signal are`	`//! creation. For convenience synchronous versions of the reset signal are`
`//! provided in both active high and active low formats.`	`//! provided in both active high and active low formats.`

`class ResetSC`	`class ResetSC:public sc_core::sc_module {`
`: public sc_core::sc_module`
`{`
`public:`	`public:`

`// Constructor`	`// Constructor`
`ResetSC (sc_core::sc_module_name name,`	`ResetSC(sc_core::sc_module_name name, int _resetCounter = 5);`
`int _resetCounter = 5);`

`// Method to drive the reset`	`// Method to drive the reset`
`void driveReset();`	`void driveReset();`

`// The ports`	`// The ports`