| Line 327... |
Line 327... |
|
|
memdump_start_addr = memdump_start;
|
memdump_start_addr = memdump_start;
|
memdump_end_addr = memdump_end;
|
memdump_end_addr = memdump_end;
|
}
|
}
|
|
|
if (bus_trans_log_enabled)
|
/*
|
{
|
if (bus_trans_log_enabled)
|
// Setup log file and register the bus monitoring function
|
{
|
busTransLog.open(bus_trans_log_file.c_str(), ios::out );
|
// Setup log file and register the bus monitoring function
|
|
busTransLog.open(bus_trans_log_file.c_str(), ios::out );
|
if (busTransLog.is_open())
|
|
{
|
if (busTransLog.is_open())
|
cout << "* System bus transactions logged to file: " <<
|
{
|
bus_trans_log_file;
|
cout << "* System bus transactions logged to file: " <<
|
|
bus_trans_log_file;
|
if (bus_trans_log_start_delay_enable)
|
|
cout << ", on at " << bus_trans_log_start_delay.to_string();
|
if (bus_trans_log_start_delay_enable)
|
cout << endl;
|
cout << ", on at " << bus_trans_log_start_delay.to_string();
|
}
|
cout << endl;
|
else
|
}
|
/* Couldn't open */
|
else
|
bus_trans_log_enabled = false;
|
// Couldn't open
|
}
|
bus_trans_log_enabled = false;
|
|
}
|
if (bus_trans_log_enabled)
|
|
{
|
|
// Setup profiling function
|
if (bus_trans_log_enabled)
|
SC_METHOD (busMonitor);
|
{
|
sensitive << clk.pos();
|
// Setup profiling function
|
dont_initialize();
|
SC_METHOD (busMonitor);
|
}
|
sensitive << clk.pos();
|
|
dont_initialize();
|
|
}
|
|
*/
|
|
|
} // Or1200MonitorSC ()
|
} // Or1200MonitorSC ()
|
|
|
//! Print usage for the options of this module
|
//! Print usage for the options of this module
|
void
|
void
|
| Line 832... |
Line 835... |
}
|
}
|
memdumpFile.close();
|
memdumpFile.close();
|
|
|
}
|
}
|
|
|
|
/*
|
|
void
|
|
Or1200MonitorSC::busMonitor()
|
|
{
|
|
|
|
// This is for the wb_conmax module. Presumably other Wishbone bus arbiters
|
|
// will need this section of the code to be re-written appropriately, along
|
|
// with the relevent functions in the OrpsocAccess module.
|
|
|
|
static busLogStates busLogState = BUS_LOG_IDLE;
|
|
static int currentMaster = -1;
|
|
static uint32_t currentAddr = 0, currentDataIn = 0;
|
|
static uint32_t currentSel = 0, currentSlave = 0;
|
|
static bool currentWe = false;
|
|
static int cyclesWaited = 0;
|
|
|
|
if (bus_trans_log_start_delay_enable)
|
|
{
|
|
if (sc_time_stamp() >= bus_trans_log_start_delay)
|
|
{
|
|
// No longer waiting
|
|
bus_trans_log_start_delay_enable = false;
|
|
cout << "* System log now enabled (time = " << bus_trans_log_start_delay.to_string() << ")" << endl;
|
|
}
|
|
|
|
if (bus_trans_log_start_delay_enable)
|
|
return;
|
|
}
|
|
|
|
switch ( busLogState )
|
|
{
|
|
case BUS_LOG_IDLE:
|
|
{
|
|
// Check the current granted master's cyc and stb inputs
|
|
uint32_t gnt = accessor->getWbArbGrant();
|
|
if (accessor->getWbArbMastCycI(gnt) && accessor->getWbArbMastStbI(gnt) &&
|
|
!accessor->getWbArbMastAckO(gnt))
|
|
{
|
|
currentAddr = accessor->getWbArbMastAdrI(gnt);
|
|
currentDataIn = accessor->getWbArbMastDatI(gnt);
|
|
currentSel = (uint32_t) accessor->getWbArbMastSelI(gnt);
|
|
currentSlave = (uint32_t)accessor->getWbArbMastSlaveSelDecoded(gnt)-1;
|
|
currentWe = accessor->getWbArbMastWeI(gnt);
|
|
currentMaster = gnt;
|
|
busLogState = BUS_LOG_WAIT_FOR_ACK;
|
|
cyclesWaited = 0;
|
|
}
|
|
}
|
|
|
|
break;
|
|
|
|
case BUS_LOG_WAIT_FOR_ACK:
|
|
|
|
cyclesWaited++;
|
|
|
|
// Check for ACK
|
|
if (accessor->getWbArbMastAckO(currentMaster))
|
|
{
|
|
// Transaction completed
|
|
busTransLog << sc_time_stamp() << " M" << currentMaster << " ";
|
|
if (currentWe)
|
|
busTransLog << " W " << hex << currentSel << " " << hex << std::setfill('0') << std::setw(8) << currentAddr << " S" << dec << currentSlave << " " << hex << std::setw(8) << currentDataIn << " " << dec << cyclesWaited << endl;
|
|
else
|
|
busTransLog << " R " << hex << currentSel << " " << hex << std::setfill('0') << std::setw(8) << currentAddr << " S" << dec << currentSlave << " " << hex << std::setw(8) << accessor->getWbArbMastDatO(currentMaster) << " " << dec << cyclesWaited << endl;
|
|
|
|
busLogState = BUS_LOG_IDLE;
|
|
}
|
|
|
void
|
break;
|
Or1200MonitorSC::busMonitor()
|
|
{
|
|
|
|
// This is for the wb_conmax module. Presumably other Wishbone bus arbiters
|
|
// will need this section of the code to be re-written appropriately, along
|
|
// with the relevent functions in the OrpsocAccess module.
|
|
|
|
static busLogStates busLogState = BUS_LOG_IDLE;
|
|
static int currentMaster = -1;
|
|
static uint32_t currentAddr = 0, currentDataIn = 0;
|
|
static uint32_t currentSel = 0, currentSlave = 0;
|
|
static bool currentWe = false;
|
|
static int cyclesWaited = 0;
|
|
|
|
if (bus_trans_log_start_delay_enable)
|
|
{
|
|
if (sc_time_stamp() >= bus_trans_log_start_delay)
|
|
{
|
|
// No longer waiting
|
|
bus_trans_log_start_delay_enable = false;
|
|
cout << "* System log now enabled (time = " << bus_trans_log_start_delay.to_string() << ")" << endl;
|
|
}
|
|
|
|
if (bus_trans_log_start_delay_enable)
|
|
return;
|
|
}
|
|
|
|
switch ( busLogState )
|
}
|
{
|
|
case BUS_LOG_IDLE:
|
|
{
|
|
// Check the current granted master's cyc and stb inputs
|
|
uint32_t gnt = accessor->getWbArbGrant();
|
|
if (accessor->getWbArbMastCycI(gnt) && accessor->getWbArbMastStbI(gnt) &&
|
|
!accessor->getWbArbMastAckO(gnt))
|
|
{
|
|
currentAddr = accessor->getWbArbMastAdrI(gnt);
|
|
currentDataIn = accessor->getWbArbMastDatI(gnt);
|
|
currentSel = (uint32_t) accessor->getWbArbMastSelI(gnt);
|
|
currentSlave = (uint32_t)accessor->getWbArbMastSlaveSelDecoded(gnt)-1;
|
|
currentWe = accessor->getWbArbMastWeI(gnt);
|
|
currentMaster = gnt;
|
|
busLogState = BUS_LOG_WAIT_FOR_ACK;
|
|
cyclesWaited = 0;
|
|
}
|
|
}
|
|
|
|
break;
|
|
|
|
case BUS_LOG_WAIT_FOR_ACK:
|
|
|
|
cyclesWaited++;
|
|
|
|
// Check for ACK
|
|
if (accessor->getWbArbMastAckO(currentMaster))
|
|
{
|
|
// Transaction completed
|
|
busTransLog << sc_time_stamp() << " M" << currentMaster << " ";
|
|
if (currentWe)
|
|
busTransLog << " W " << hex << currentSel << " " << hex << std::setfill('0') << std::setw(8) << currentAddr << " S" << dec << currentSlave << " " << hex << std::setw(8) << currentDataIn << " " << dec << cyclesWaited << endl;
|
|
else
|
|
busTransLog << " R " << hex << currentSel << " " << hex << std::setfill('0') << std::setw(8) << currentAddr << " S" << dec << currentSlave << " " << hex << std::setw(8) << accessor->getWbArbMastDatO(currentMaster) << " " << dec << cyclesWaited << endl;
|
|
|
|
busLogState = BUS_LOG_IDLE;
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
} // busMonitor ()
|
return;
|
|
|
|
} // busMonitor ()
|
|
*/
|
void
|
void
|
Or1200MonitorSC::simPrintf(uint32_t stackaddr, uint32_t regparam)
|
Or1200MonitorSC::simPrintf(uint32_t stackaddr, uint32_t regparam)
|
{
|
{
|
|
|
//cerr << hex << stackaddr << " " << regparam << endl;
|
//cerr << hex << stackaddr << " " << regparam << endl;
|
