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// You should have received a copy of the GNU Lesser General Public License
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// You should have received a copy of the GNU Lesser General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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// ----------------------------------------------------------------------------
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// ----------------------------------------------------------------------------
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// $Id: Or1200MonitorSC.cpp 303 2009-02-16 11:20:17Z jeremy $
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// $Id$
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#include <iostream>
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#include <iostream>
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#include <iomanip>
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#include <iomanip>
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#include <fstream>
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#include <fstream>
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#include <sys/types.h>
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#include <sys/types.h>
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}
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}
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}
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}
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// checkInstruction monitors the bus for special NOP instructionsl
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SC_METHOD (checkInstruction);
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sensitive << clk.pos();
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dont_initialize();
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if (profiling_enabled)
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if (profiling_enabled)
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{
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{
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profileFile.open(profileFileName.c_str(), ios::out); // Open profiling log file
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profileFile.open(profileFileName.c_str(), ios::out); // Open profiling log file
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if(profileFile.is_open())
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if(profileFile.is_open())
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{
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{
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memdump_start_addr = memdump_start;
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memdump_start_addr = memdump_start;
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memdump_end_addr = memdump_end;
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memdump_end_addr = memdump_end;
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}
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}
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// checkInstruction monitors the bus for special NOP instructionsl
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SC_METHOD (checkInstruction);
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sensitive << clk.pos();
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dont_initialize();
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} // Or1200MonitorSC ()
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} // Or1200MonitorSC ()
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//! Print command line switches for the options of this module
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//! Print command line switches for the options of this module
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void
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void
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Or1200MonitorSC::printSwitches()
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Or1200MonitorSC::printSwitches()
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//! - l.nop 1 Terminate the program
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//! - l.nop 1 Terminate the program
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//! - l.nop 2 Report the value in R3
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//! - l.nop 2 Report the value in R3
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//! - l.nop 3 Printf the string with the arguments in R3, etc
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//! - l.nop 3 Printf the string with the arguments in R3, etc
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//! - l.nop 4 Print a character
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//! - l.nop 4 Print a character
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//#define OR1200_OR32_NOP_BITS_31_TO_26 6'b000101
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#define OR1200_OR32_NOP 0x14000000
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extern int SIM_RUNNING;
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extern int SIM_RUNNING;
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void
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void
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Or1200MonitorSC::checkInstruction()
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Or1200MonitorSC::checkInstruction()
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{
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{
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uint32_t r3;
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uint32_t r3;
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double ts;
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double ts;
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cycle_count++;
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cycle_count++;
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/* Check if this counts as an "executed" instruction */
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if (!accessor->getWbFreeze())
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if ((((accessor->getWbInsn() & 0xfc000000) != (uint32_t) OR1200_OR32_NOP) || !(accessor->getWbInsn() & (1<<16))) && !(accessor->getExceptFlushpipe() && accessor->getExDslot()))
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insn_count++;
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else
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// Exception version
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if (accessor->getExceptFlushpipe())
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insn_count++;
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// Check the instruction when the freeze signal is low.
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// Check the instruction when the freeze signal is low.
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//if (!accessor->getWbFreeze())
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//if (!accessor->getWbFreeze())
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if ((!accessor->getWbFreeze()) && (accessor->getExceptType() == 0))
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if ((!accessor->getWbFreeze()) && (accessor->getExceptType() == 0))
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{
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{
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// Increment instruction counter
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insn_count++;
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// Do something if we have l.nop
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// Do something if we have l.nop
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switch (accessor->getWbInsn())
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switch (accessor->getWbInsn())
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{
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{
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case NOP_EXIT:
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case NOP_EXIT:
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r3 = accessor->getGpr (3);
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r3 = accessor->getGpr (3);
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break;
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break;
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}
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}
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}
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}
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} // checkInstruction()
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} // callLog()
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//! Method to output the state of the processor
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//! Method to output the state of the processor
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//! This function will output to a file, if enabled, the status of the processor
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//! This function will output to a file, if enabled, the status of the processor
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//! For now, it's just the PPC and instruction.
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//! This copies what the verilog testbench module, or1200_monitor does in it its
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//! process which calls the display_arch_state tasks. This is designed to be
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//! identical to that process, so the output is identical
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#define PRINT_REGS 1
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#define PRINT_REGS 1
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void
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void
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Or1200MonitorSC::displayState()
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Or1200MonitorSC::displayState()
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{
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{
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uint32_t wbinsn;
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bool printregs = false;
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// Calculate how many instructions we've actually calculated by ignoring cycles where we're frozen, delay slots and flushpipe cycles
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if ((!accessor->getWbFreeze()) && !(accessor->getExceptFlushpipe() && accessor->getExDslot()))
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if (logging_enabled == 0)
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return; // If we didn't inialise a file, then just return.
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// Output the state if we're not frozen and not flushing during a delay slot
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// Output the state if we're not frozen and not flushing during a delay slot
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if ((!accessor->getWbFreeze()) && !(accessor->getExceptFlushpipe() && accessor->getExDslot()))
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if (!accessor->getWbFreeze())
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{
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if ((((accessor->getWbInsn() & 0xfc000000) != (uint32_t) OR1200_OR32_NOP) || !(accessor->getWbInsn() & (1<<16))) && !(accessor->getExceptFlushpipe() && accessor->getExDslot()))
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{
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{
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// Print PC, instruction
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// Print PC, instruction
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statusFile << "\nEXECUTED("<< std::setfill(' ') << std::setw(11) << dec << insn_count << "): " << std::setfill('0') << hex << std::setw(8) << accessor->getWbPC() << ": " << hex << accessor->getWbInsn() << endl;
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statusFile << "\nEXECUTED("<< std::setfill(' ') << std::setw(11) << dec << insn_count << "): " << std::setfill('0') << hex << std::setw(8) << accessor->getWbPC() << ": " << hex << std::setw(8) << accessor->getWbInsn() << endl;
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#if PRINT_REGS
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#if PRINT_REGS
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printregs = true;
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#endif
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}
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else
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{
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// Exception version
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if (accessor->getExceptFlushpipe())
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{
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// Print PC, instruction, indicate it caused an exception
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statusFile << "\nEXECUTED("<< std::setfill(' ') << std::setw(11) << dec << insn_count << "): " << std::setfill('0') << hex << std::setw(8) << accessor->getExPC() << ": " << hex << std::setw(8) << accessor->getExInsn() << " (exception)" << endl;
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#if PRINT_REGS
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printregs = true;
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#endif
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}
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}
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if (printregs)
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{
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// Print general purpose register contents
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// Print general purpose register contents
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for (int i=0; i<32; i++)
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for (int i=0; i<32; i++)
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{
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{
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if ((i%4 == 0)&&(i>0)) statusFile << endl;
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if ((i%4 == 0)&&(i>0)) statusFile << endl;
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statusFile << std::setfill('0');
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statusFile << std::setfill('0');
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statusFile << "SR : " << hex << std::setw(8) << (uint32_t) accessor->getSprSr() << " ";
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statusFile << "SR : " << hex << std::setw(8) << (uint32_t) accessor->getSprSr() << " ";
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statusFile << "EPCR0: " << hex << std::setw(8) << (uint32_t) accessor->getSprEpcr() << " ";
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statusFile << "EPCR0: " << hex << std::setw(8) << (uint32_t) accessor->getSprEpcr() << " ";
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statusFile << "EEAR0: " << hex << std::setw(8) << (uint32_t) accessor->getSprEear() << " ";
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statusFile << "EEAR0: " << hex << std::setw(8) << (uint32_t) accessor->getSprEear() << " ";
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statusFile << "ESR0 : " << hex << std::setw(8) << (uint32_t) accessor->getSprEsr() << endl;
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statusFile << "ESR0 : " << hex << std::setw(8) << (uint32_t) accessor->getSprEsr() << endl;
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#endif
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}
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}
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}
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return;
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return;
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} // displayState()
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} // displayState()
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