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#include "Vorpsoc_top_or1200_except.h"
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#include "Vorpsoc_top_or1200_except.h"
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#include "Vorpsoc_top_or1200_sprs.h"
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#include "Vorpsoc_top_or1200_sprs.h"
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#include "Vorpsoc_top_or1200_rf.h"
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#include "Vorpsoc_top_or1200_rf.h"
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#include "Vorpsoc_top_or1200_dpram.h"
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#include "Vorpsoc_top_or1200_dpram.h"
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// Need RAM instantiation has parameters after module name
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// Need RAM instantiation has parameters after module name
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// Includes for wb_ram
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// Include for ram_wb
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//#include "Vorpsoc_top_ram_wb__D20_A19_M800000.h"
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#include "Vorpsoc_top_ram_wb__A20_D20_M800000_MB17.h"
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//#include "Vorpsoc_top_ram_wb_sc_sw__D20_A19_M800000.h"
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// Include for ram_wb_b3
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// Include for wb_ram_b3
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#include "Vorpsoc_top_ram_wb_b3__pi3.h"
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#include "Vorpsoc_top_wb_ram_b3__D20_A17_M800000.h"
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// Bus arbiter include - but is for old arbiter, no longer used
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//#include "Vorpsoc_top_wb_conbus_top__pi1.h"
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//! Constructor for the ORPSoC access class
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//! Constructor for the ORPSoC access class
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//! Initializes the pointers to the various module instances of interest
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//! Initializes the pointers to the various module instances of interest
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//! within the Verilator model.
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//! within the Verilator model.
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or1200_except = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_except;
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or1200_except = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_except;
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or1200_sprs = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_sprs;
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or1200_sprs = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_sprs;
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rf_a = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_rf->rf_a;
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rf_a = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_rf->rf_a;
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// Assign main memory accessor objects
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// Assign main memory accessor objects
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// For old ram_wb: ram_wb_sc_sw = orpsoc_top->v->ram_wb0->ram0;
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// For old ram_wb: ram_wb_sc_sw = orpsoc_top->v->ram_wb0->ram0;
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ram_wb_sc_sw = orpsoc_top->v->wb_ram_b3_0;
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//ram_wb_sc_sw = orpsoc_top->v->wb_ram_b3_0;
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wishbone_ram = orpsoc_top->v->ram_wb0->ram_wb_b3_0;
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// Assign arbiter accessor object
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// Assign arbiter accessor object
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//wb_arbiter = orpsoc_top->v->wb_conbus;
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//wb_arbiter = orpsoc_top->v->wb_conbus;
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} // OrpsocAccess ()
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} // OrpsocAccess ()
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//! @return The value of the 32-bit memory word at addr
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//! @return The value of the 32-bit memory word at addr
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uint32_t
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uint32_t
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OrpsocAccess::get_mem32 (uint32_t addr)
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OrpsocAccess::get_mem32 (uint32_t addr)
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{
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{
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return (ram_wb_sc_sw->get_mem) (addr/4);
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return (wishbone_ram->get_mem) (addr/4);
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} // get_mem32 ()
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} // get_mem32 ()
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//! Access a byte from the Wishbone SRAM memory
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//! Access a byte from the Wishbone SRAM memory
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addr = addr / 4;
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addr = addr / 4;
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if (addr != cached_word_addr)
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if (addr != cached_word_addr)
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{
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{
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cached_word_addr = addr;
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cached_word_addr = addr;
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// Convert address to word number here
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// Convert address to word number here
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word = (ram_wb_sc_sw->get_mem) (addr);
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word = (wishbone_ram->get_mem) (addr);
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cached_word = word;
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cached_word = word;
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}
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}
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else
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else
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word = cached_word;
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word = cached_word;
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//! Write value to the Wishbone SRAM memory
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//! Write value to the Wishbone SRAM memory
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void
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void
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OrpsocAccess::set_mem32 (uint32_t addr, uint32_t data)
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OrpsocAccess::set_mem32 (uint32_t addr, uint32_t data)
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{
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{
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(ram_wb_sc_sw->set_mem) (addr/4, data);
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(wishbone_ram->set_mem) (addr/4, data);
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} // set_mem32 ()
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} // set_mem32 ()
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//! Trigger the $readmemh() system call
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//! Trigger the $readmemh() system call
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void
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void
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OrpsocAccess::do_ram_readmemh (void)
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OrpsocAccess::do_ram_readmemh (void)
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{
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{
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(ram_wb_sc_sw->do_readmemh) ();
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(wishbone_ram->do_readmemh) ();
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} // do_ram_readmemh ()
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} // do_ram_readmemh ()
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//! Access for the OR1200 GPRs
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//! Access for the OR1200 GPRs
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