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#include "Vorpsoc_top_or1200_ctrl.h"
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#include "Vorpsoc_top_or1200_ctrl.h"
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#include "Vorpsoc_top_or1200_except.h"
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#include "Vorpsoc_top_or1200_except.h"
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#include "Vorpsoc_top_or1200_sprs.h"
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#include "Vorpsoc_top_or1200_sprs.h"
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#include "Vorpsoc_top_or1200_rf.h"
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#include "Vorpsoc_top_or1200_rf.h"
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#include "Vorpsoc_top_or1200_dpram.h"
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#include "Vorpsoc_top_or1200_dpram.h"
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//#include "Vorpsoc_top_ram_wb.h"
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//#include "Vorpsoc_top_ram_wb_sc_sw.h"
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#include "Vorpsoc_top_ram_wb__D20_A18_M800000.h"
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#include "Vorpsoc_top_ram_wb_sc_sw__D20_A18_M800000.h"
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//! Constructor for the ORPSoC access class
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//! Constructor for the ORPSoC access class
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//! Initializes the pointers to the various module instances of interest
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//! Initializes the pointers to the various module instances of interest
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//! within the Verilator model.
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//! within the Verilator model.
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{
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{
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or1200_ctrl = orpsoc_top->v->i_or1k->i_or1200_top->or1200_cpu->or1200_ctrl;
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or1200_ctrl = orpsoc_top->v->i_or1k->i_or1200_top->or1200_cpu->or1200_ctrl;
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or1200_except = orpsoc_top->v->i_or1k->i_or1200_top->or1200_cpu->or1200_except;
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or1200_except = orpsoc_top->v->i_or1k->i_or1200_top->or1200_cpu->or1200_except;
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or1200_sprs = orpsoc_top->v->i_or1k->i_or1200_top->or1200_cpu->or1200_sprs;
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or1200_sprs = orpsoc_top->v->i_or1k->i_or1200_top->or1200_cpu->or1200_sprs;
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rf_a = orpsoc_top->v->i_or1k->i_or1200_top->or1200_cpu->or1200_rf->rf_a;
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rf_a = orpsoc_top->v->i_or1k->i_or1200_top->or1200_cpu->or1200_rf->rf_a;
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ram_wb_sc_sw = orpsoc_top->v->ram_wb0->ram0;
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} // OrpsocAccess ()
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} // OrpsocAccess ()
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//! Access for the ex_freeze signal
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//! @return The value of the or1200_ctrl.ex_freeze signal
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bool
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OrpsocAccess::getExFreeze ()
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{
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return or1200_ctrl->ex_freeze;
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} // getExFreeze ()
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//! Access for the wb_freeze signal
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//! Access for the wb_freeze signal
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//! @return The value of the or1200_ctrl.wb_freeze signal
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//! @return The value of the or1200_ctrl.wb_freeze signal
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{
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{
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return or1200_except->ex_dslot;
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return or1200_except->ex_dslot;
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} // getExDslot ()
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} // getExDslot ()
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//! Access for the except_type value
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//! @return The value of the or1200_except.except_type register
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uint32_t
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OrpsocAccess::getExceptType ()
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{
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return (or1200_except->get_except_type) ();
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} // getExceptType ()
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//! Access for the id_pc register
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//! Access for the id_pc register
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//! @return The value of the or1200_except.id_pc register
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//! @return The value of the or1200_except.id_pc register
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uint32_t
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uint32_t
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{
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{
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return (or1200_except->get_id_pc) ();
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return (or1200_except->get_id_pc) ();
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} // getIdPC ()
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} // getIdPC ()
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//! Access for the ex_pc register
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//! @return The value of the or1200_except.id_ex register
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uint32_t
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OrpsocAccess::getExPC ()
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{
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return (or1200_except->get_ex_pc) ();
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} // getExPC ()
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//! Access for the wb_pc register
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//! Access for the wb_pc register
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//! @return The value of the or1200_except.wb_pc register
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//! @return The value of the or1200_except.wb_pc register
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uint32_t
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uint32_t
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{
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{
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return (or1200_except->get_wb_pc) ();
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return (or1200_except->get_wb_pc) ();
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} // getWbPC ()
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} // getWbPC ()
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//! Access for the id_insn register
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//! @return The value of the or1200_ctrl.wb_insn register
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uint32_t
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OrpsocAccess::getIdInsn ()
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{
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return (or1200_ctrl->get_id_insn) ();
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} // getIdInsn ()
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//! Access for the ex_insn register
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//! @return The value of the or1200_ctrl.ex_insn register
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uint32_t
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OrpsocAccess::getExInsn ()
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{
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return (or1200_ctrl->get_ex_insn) ();
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} // getExInsn ()
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//! Access for the wb_insn register
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//! Access for the wb_insn register
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//! @return The value of the or1200_ctrl.wb_insn register
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//! @return The value of the or1200_ctrl.wb_insn register
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uint32_t
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uint32_t
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{
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{
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return (or1200_ctrl->get_wb_insn) ();
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return (or1200_ctrl->get_wb_insn) ();
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} // getWbInsn ()
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} // getWbInsn ()
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//! Access for the id_insn register
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//! Access the Wishbone SRAM memory
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//! @return The value of the or1200_ctrl.wb_insn register
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//! @return The value of the memory word at addr
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uint32_t
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uint32_t
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OrpsocAccess::getIdInsn ()
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OrpsocAccess::get_mem (uint32_t addr)
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{
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{
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return (or1200_ctrl->get_id_insn) ();
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return (ram_wb_sc_sw->get_mem) (addr);
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} // getIdInsn ()
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} // get_mem ()
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//! Write value to the Wishbone SRAM memory
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void
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OrpsocAccess::set_mem (uint32_t addr, uint32_t data)
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{
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(ram_wb_sc_sw->set_mem) (addr, data);
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} // set_mem ()
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//! Trigger the $readmemh() system call
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void
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OrpsocAccess::do_ram_readmemh (void)
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{
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(ram_wb_sc_sw->do_readmemh) ();
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} // do_ram_readmemh ()
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//! Access for the OR1200 GPRs
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//! Access for the OR1200 GPRs
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//! These are extracted from memory using the Verilog function
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//! These are extracted from memory using the Verilog function
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